2.2 WCET Results

The following table lists the normal execution time and WCET of a 32 x 32 matrix multiplication task measured using the example application.

Program SegmentU54_1 CoreU54_4 Core4

Code (bytes)

ITIM (12736)

LIM (804961)

DDR cached

Data

LIM (780002)

LIM

DDR cached

Stack

LIM

LIM

DDR cached

Normal Execution Time (±deviation) in mcycles

8407148 (±21 cycles)

(14.0119 ms)

8407167 (±4 cycles)

(14.0119 ms)

1955036 (±136 cycles)

(3.258 ms)

WCET3

8409198 (±61 cycles)

(14.0153 ms)

8409426 (±200 cycles)

(14.0157 ms)

1971234 (±1653 cycles)

(3.285 ms)

  1. All sections are combined.
  2. Data and stack are combined.
  3. WCET includes the following:
    1. Branch prediction trashing and branch prediction scheme (static) are enabled in core U54_4 and U54_1.
    2. Adversarial runs on U54_3; cache flush runs on U54_2.
    3. Interrupt with execution time (1000 mcycle).
  4. The DDR cached execution timings are given for comparison purpose only.
Note: WCET (seconds) = (1 ∕ (CPU Core Frequency in MHz × 1000 × 1000)) ×  (number of execution cycles), where

CPU Core Frequency = 600 MHz