1.2 Data Transfers

Data transfers between master and slave devices on the SPI bus are handled by separate transmit and receive FIFO buffers. Refer to the data sheet for more information about the separate transmit and receive FIFO bufferss found on this SPI module. The SPI module works in Full-Duplex mode, meaning that during each clock cycle, the SPI module is simultaneously transmitting and receiving data from the activated slave. This bit-wise exchange of data will continue until there is no more data to be exchanged or an interrupt occurs, at which point the master will stop sending clock signals to the slave.