6.23.2 Status Register (SREG) and Boolean Formula


I	T	H	S	V	N	Z	C
–	–	–	–	–	–	–	–

Example:

      eor r27,r27  ; Clear r27
loop: inc r27      ; Increase r27
      ... 
      cpi r27,5    ; Compare r27 to 5
      brne loop    ; Branch if r27<>5
      nop          ; Loop exit (do nothing)

Words: 1 (2 bytes)

Table 6-23. Cycles
Name	Cycles
Name	i	ii
AVRe	1	2
AVRxm	1	2
AVRxt	1	2
AVRrc	1	2

i) If the condition is false.

ii) If the condition is true.