6.3.2 Status Register (SREG) and Boolean Formula


I	T	H	S	V	N	Z	C
–	–	–	⇔	⇔	⇔	⇔	⇔

S

N ⊕ V, for signed tests.

V

Rdh7 ∧ R15

Set if two’s complement overflow resulted from the operation; cleared otherwise.

N

R15

Set if MSB of the result is set; cleared otherwise.

Z

R15 ∧ R14 ∧ R13 ∧ R12 ∧ R11 ∧ R10 ∧ R9 ∧ R8∧R7 ∧ R6 ∧ R5 ∧ R4 ∧ R3 ∧ R2 ∧ R1 ∧ R0

Set if the result is 0x0000; cleared otherwise.

C

R15 ∧ Rdh7

Set if there was a carry from the MSB of the result; cleared otherwise.

R (Result) equals R[d+1]:Rd after the operation.

Example:

      adiw      r24,1      ; Add 1 to r25:r24
      adiw      ZL,63      ; Add 63 to the Z-pointer(r31:r30)