6.73.2 Status Register (SREG) and Boolean Formula

ITHSVNZC
H
Rd3
S
N ⊕ V, for signed tests.
V
N ⊕ C, for N and C after the shift.
N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7R6R5R4R3R2R1R0

Set if the result is 0x00; cleared otherwise.

C

Rd7

Set if, before the shift, the MSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

      add   r0,r4  ; Add r4 to r0
      lsl   r0     ; Multiply r0 by 2
Words
1 (2 bytes)
Table 6-73. Cycles
NameCycles
AVRe1
AVRxm1
AVRxt1
AVRrc1