6.40.2 Status Register (SREG) and Boolean Formula

ITHSVNZC
0
S

0

Sign flag cleared.

Example:

      add   r2,r3  ; Add r3 to r2
      cls          ; Clear Sign flag
Words
1 (2 bytes)
Table 6-40. Cycles
NameCycles
AVRe1
AVRxm1
AVRxt1
AVRrc1