6.74.2 Status Register (SREG) and Boolean Formula

ITHSVNZC
–––⇔⇔0⇔⇔
S
N ⊕ V, for signed tests.
V
N ⊕ C, for N and C after the shift.
N
0
Z

R7 ∧ R6 ∧ R5 ∧ R4 ∧ R3 ∧ R2 ∧ R1 ∧ R0

Set if the result is 0x00; cleared otherwise.

C

Rd0

Set if, before the shift, the LSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

      add   r0,r4  ; Add r4 to r0
      lsr   r0     ; Divide r0 by 2
Words
1 (2 bytes)
Table 6-74. Cycles
NameCycles
AVRe1
AVRxm1
AVRxt1
AVRrc1