6.56.2 Status Register (SREG) and Boolean Formula
| I | T | H | S | V | N | Z | C |
| – | – | – | – | – | – | ⇔ | ⇔ |
- C
-
R16
Set if bit 15 of the result before the left shift is set; cleared otherwise.
- Z
-
R15 ∧ R14 ∧ R13 ∧ R12 ∧ R11 ∧ R10 ∧ R9 ∧ R8∧R7 ∧ R6 ∧ R5 ∧ R4 ∧ R3 ∧ R2 ∧ R1 ∧ R0
Set if the result is
0x0000; cleared otherwise.
R (Result) equals R1,R0 after the operation.
Example:
fmuls r23,r22 ; Multiply signed r23 and r22 in (1.7) format,
; result in (1.15) format
movw r22,r0 ; Copy result back in r23:r22
- Words
- 1 (2 bytes)
| Name | Cycles |
|---|---|
| AVRe | 2 |
| AVRxm | 2 |
| AVRxt | 2 |
| AVRrc | N/A |
