6.77.2 Status Register (SREG) and Boolean Formula


I	T	H	S	V	N	Z	C
–	–	–	–	–	–	⇔	⇔

C

R15

Z

R15 ∧ R14 ∧ R13 ∧ R12 ∧ R11 ∧ R10 ∧ R9 ∧ R8∧R7 ∧ R6 ∧ R5 ∧ R4 ∧ R3 ∧ R2 ∧ R1 ∧ R0

Set if the result is 0x0000; cleared otherwise.

R (Result) equals R1,R0 after the operation.

Example:

      mul   r5,r4   ; Multiply unsigned r5 and r4
      movw  r4,r0   ; Copy result back in r5:r4

Words: 1 (2 bytes)

Table 6-77. Cycles
Name	Cycles
AVRe	2
AVRxm	2
AVRxt	2
AVRrc	N/A

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