25.8.4 CLB Configuration Steps

Configuration of the CLB consists of the following steps:
  1. Determine which of the CLB configuration modes will be used:
    • CPU executes code to configure the CLB
    • Automatic Configuration on Start-up mode with CPU execution
    • Automatic Configuration on Start-up mode with CPU halt
  2. Create the CLB bitstream using the Microchip CLB Synthesizer:
    • Select the inputs into the CLB using the CLB Input Selection latches
    • Configure input edge detection and synchronization using the CLB Input Synchronizer latches
    • Select the inputs into the BLEs using the BLE Input Selection latches
    • Configure the BLE LUTs with entries corresponding to each expected input combination using the CLB LUT latches
    • Configure output edge detection and synchronization using the CLB Output Synchronizer latches
    • Configure the BLE output flops using the BLE Flop Select latches
    • Configure the CLB interrupts using the CLB Interrupt Selection latches
    • Determine which BLE output is routed to the sixteen PPS outputs using the CLB Output Selection latches
  3. Determine which BLE output is routed to the CLB Software Output Registers by configuring CLBSWOUTH and CLBSWOUTL.
  4. Configure the CLB inputs to any peripherals used by the application.
  5. Configure CLB outputs using the CLBPPSOUT registers (see the "Peripheral Pin Select (PPS)" chapter).
  6. Select the CLB clock source and clock prescaler using the CLBCLK register.
    • If the “CPU executes code to configure the CLB” mode is used:
      1. Transfer the CLB bitstream to program memory using the Microchip CLB Synthesizer
      2. Configure the NVM Scanner to interact with the CLB module (refer to the “CRC” chapter for more details)
      3. Enable the scanner to load the CLB netlist values into the CLB latches
      4. Once the scanner has loaded the CLB configuration into NVM, enable the CLB module by setting the EN bit.
    • If either of the Automatic Configuration on Start-up modes are used:
      1. Configure any other peripherals that are used by the application(1)
      2. Ensure that the high address byte of the location in program memory of the CLB bitstream is loaded into the CLBSA bits of the Configuration Words
      3. Transfer the CLB bitstream to program memory using the Microchip CLB Synthesizer
      4. Enable the CLB module by setting the EN bit
Note:
  1. When CPUHALT = 1, the CLB module SFRs should also be configured in the same start-up routine as the other peripherals used in the application. Peripherals that are enabled during 'Automatic Configuration on Start-up with CPU execution' mode will begin to operate immediately. If application code reconfigures a peripheral while it is enabled, unpredictable operation may occur.

The outputs of the CLB can be viewed through external pins via PPS, or by reading the CLBSWOUTH, CLBSWOUTL, CLBOUTH, and/or CLBOUTL registers. The CLB outputs are also internally connected to other peripherals.