2.3 Free-Running Mode

Task: Free-running differential conversion on channel 0, using ADC0 and ADC3 as positive and negative inputs.

  • Configure the MUX Positive Input and MUX Negative Input bitfields (MUXPOS and MUXNEG) in Channel 0 (CH0MUXCTRL) to 0x00 and 0x03 respectively
  • Configure the Free Run bit (FREERUN) in Control Register B (CTRLB) to enable free running mode
  • Configure the Enable bit (ENABLE) in Control Register A (CTRLA) to enable the ADC module without calibrating. Wait for the ADC start-up time (typical max. 24 ADC clocks)
  • Optionally, wait for the Interrupt Flag bit for channel 0 (CH0IF) in the Interrupt Flags register (INTFLAGS) to be set, indicating that a new conversion is finished. Clear the flag by writing a 1 to it, as it is going to be used later.
  • Read the Result register pair for channel 0 (CH0RESL/CH0RESH) to retrieve the latest 12-bit conversion results as a 2-byte value
Note: It is not strictly required to wait for the interrupt flag when using free-running mode. However, to make sure that a new conversion is done, wait for the flag, clear it, and then read the result. Also note that it is recommended to use the Free-Running Mode together with DMA data transfer to offload work from the CPU.