2.2 Multiple Channels

Task: One single-ended conversion of ADC input 3 and 6 using virtual channel 1 and 3.

• Configure the Input Mode bitfield (INPUTMODE) in Channel 1 Control Register (CH1CTRL) and Channel 3 Control Register (CH3CTRL) equal to 0x01 to select single-ended input on both channels
• Configure the MUX Positive Input bitfield (MUXPOS) in the MUX Control Register for channel 1 and 3 (CH1MUXCTRL and CH3MUXCTRL) equal to 0x03 and 0x06 respectively
• Configure the Enable bit (ENABLE) in Control Register A (CTRLA) to enable the ADC module without calibrating. Wait for the ADC start-up time (typical max. 24 ADC clocks).
• Configure the Start Conversion bit for channel 1 and 3 (CH1START and CH3START) in Control Register A (CTRLA) to start two conversions
• Wait for the Interrupt Flag bits for channel 1 and 3 (CH1IF and CH3IF) in the Interrupt Flags register (INTFLAGS) to be set, indicating that the conversions are finished
• Read the Result register pair for channel 1 and 3 (CH1RESL/CH1RESH and CH3RESL/CH3RESH) to get the 12- bit conversion results as 2-byte values