2.1.1 Software Only Implementation

With the software only implementation provided with this application note, it is possible to have several 1-Wire buses connected to one AVR. All buses must, however, be connected to the same I/O port, but which port is optional at compile-time. This limits the number of buses to eight, but the placement of buses within the port is fully configurable. All pins not used for 1-Wire buses are unaffected. Since all 1-Wire buses are connected to the same port, several operations can be performed on one or more buses at the same time. This is accomplished through an argument called pin or pins, that is passed to every function. This argument should contain a bitmask of the pins that should be used for this operation. It is, for instance, possible to send the Reset signal to eight buses at the same time by passing 0xff as the pins argument. The value returned from the same function will be a bitmask of all buses where one or more slave devices answered with a presence signal. This bitmask can then be passed as the pins argument to a function issuing the SKIP ROM command, and so on. All functions in this implementation support pin selection. As a general rule, all commands that write to the bus can address several buses at the same time. Commands that read more than one bit from the bus in some way can only address one bus.

Initialization

The initialization procedure for the software only 1-Wire interface is really simple. It consists only of setting the 1-Wire pins in input mode, and enable the internal pull-up resistor, if required, to put the bus in idle mode. Some devices will react to this rising edge on the bus as the end of a Reset signal and reply with a Presence signal. To ensure that this signal does not interfere with any communication, a delay equally long to the reset recovery time is inserted.

Bit-level functions

The bit-level functions are implemented according to application note AN126 from Maxim Integrated. All timing parameters comply with the recommended values in this application note. Ten different delays are needed. These are listed in the table below.

Table 2-1. Bit Transfer Layer Delays
ParameterRecommended Delay [μs]
A6
B64
C60
D10
E9
F55
G0
H480
I70
J410
Note: G delay is zero in standard mode.

Since the I/O operations are implemented in C and not assembly language, compiler optimizations and other factors could affect timing. It is recommended to observe the waveforms generated by each bit-level function with an oscilloscope and adjust delays if needed.

The bit transfer layer functions are implemented, as shown in the figure below. Note that the function “DetectPresence” both sends the “Reset” signal, and listens for the “Presence signal”. Note that all bit transfer layer functions can address several buses at the same time.

Figure 2-1. Bit Transfer Layer Functions

Two macros are included to drive the bus low and to release the bus. These are implemented as macros because they occur frequently, and the overhead caused by function calls is unwanted because of the strict timing requirements.