2 UART with Protocol as DMX Master

As mentioned in the previous section, the UART with protocol helps simplify user firmware by managing the timing requirements for the DMX protocol. User firmware needs to configure the module in DMX mode, setup the baud rate generator for 250k baud based on the system clock settings, and program the number of bytes to be sent in the DMX packet.

The start of a new DMX packet is signified by the Break condition, followed by a logical one referred to as the Mark After Break (MAB) condition. The Break condition serves as a framing reference for the DMX receivers that may have lost synchronization. The UART module will produce the break, followed by the MAB, as soon as the first byte is loaded in the Transmit Buffer (UxTXB). The number of data bytes to be sent after the start code is defined by the value in the UART Parameter 1 (UxP1) register. User firmware should load this register at a value of one less than the total number of data bytes to be sent excluding the start code. Refer to the code examples below for more details.

After the required number of bytes have been transmitted, the UART module will produce two stop bits on the bus, which signifies the end of a DMX packet. The line is then held at the Mark (logical one) condition until the next Break condition is produced. This state of logical one is called the Mark Before.

To start the next DMX packet, the user firmware has to load the UxTXB register. There is no need to reconfigure the module unless the next packet is of a different size.