4 Power Supply Noise

Hardware designers are typically faced with the challenge of increasing the amount of functionality on a PCB while reducing the overall footprint. This often leads to switching to cleaner power supplies at the cost of removing previously necessary filtering circuitry. The often overlooked side-effect is that having multiple components sharing an unfiltered common power supply will propagate any noise and interference generated by one device will now directly impact the jitter performance of all other devices.

For clocking circuits, power supply noise translates into additional jitter. Traditional XOs are very simple circuits that are composed of an inverting amplifier driving a crystal. Due to their simple design, vendors often overlook evaluating these devices for power supply noise rejection. In many cases, the amplifier is designed, tested, and evaluated only in low-noise environments, using a clean power supply and minimal discrete components. Being primarily an analog circuit, sensitive nodes can easily couple noise. That noise will translate to output jitter in the form of spurs that modulate at the fundamental oscillation frequency. The more sensitive the amplifier, the higher the spur magnitude will be for a given amount of noise.

A device’s power supply rejection can typically be managed by applying a filter across the power supply. This can be as simple the addition of a ferrite bead and a discrete SMD capacitor (a low-pass filter). A linear regulator can also be used to filter supply noise. Depending on what is observed on the power supply, some cases might require having to use both circuits in order to filter across the entire frequency band that a device might experience supply ripple.