32.4.1 External Clock/Oscillator Timing Requirements

Figure 32-4. Clock Timing
Table 32-9. 
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
ECL Oscillator
OS1FECLClock Frequency——16MHz
OS2TECL_DCClock Duty Cycle40—60%
ECH Oscillator
OS5FECHClock Frequency——32MHz
OS6TECH_DCClock Duty Cycle40—60%
System Oscillator
OS20FOSCSystem Clock Frequency——32MHzNote 2, Note 3
OS21FCYInstruction Frequency—FOSC/4—MHz
OS22TCYInstruction Period1251/FCY—nsNote 1
* These parameters are characterized but not tested.

† - Data in ‘Typ’ column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at ‘min’ values with an external clock applied to CLKIN pin. When an external clock input is used, the ‘max’ cycle time limit is ‘DC’ (no clock) for all devices.
  2. The system clock frequency (FOSC) is selected by the ‘main clock switch controls’ as described in the “OSC - Oscillator Module” chapter.
  3. The system clock frequency (FOSC) must meet the voltage requirements defined in the “Standard Operating Conditions” section.