11.3.3 OSCEN

Oscillator Enable Register
Name: OSCEN
Offset: 0x891

Bit 76543210 
  HFOENMFOENLFOEN ADOEN   
Access R/WR/WR/WR/W 
Reset 0000 

Bit 6 – HFOEN HFINTOSC Enable

ValueDescription
1 HFINTOSC is explicitly enabled, operating as specified by the OSCFRQ register
0 HFINTOSC can be enabled by a peripheral request

Bit 5 – MFOEN MFINTOSC Enable

ValueDescription
1 MFINTOSC is explicitly enabled
0 MFINTOSC can be enabled by a peripheral request

Bit 4 – LFOEN LFINTOSC Enable

ValueDescription
1 LFINTOSC is explicitly enabled
0 LFINTOSC can be enabled by a peripheral request

Bit 2 – ADOEN ADCRC Oscillator Enable

ValueDescription
1 ADCRC is explicitly enabled
0 ADCRC may be enabled by a peripheral request