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PIC16F17114/15/24/25/44/45 Full-Featured 8/14/20-Pin Microcontrollers
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31
MSSP - Host Synchronous Serial Port Module
31.2
I
2
C Mode Overview
31.2.4
I
2
C Host Mode
31.2.4.1
I
2
C Host Mode Operation
31.2.4.1.8
Effects of a Reset
Introduction
PIC16F171
Family Summary
Core Features
1
Packages
2
Pin Diagrams
3
Pin Allocation Tables
4
Guidelines for Getting Started with
PIC16F171
Microcontrollers
5
Register and Bit Naming Conventions
6
Register Legend
7
Enhanced Mid-Range CPU
8
Device Configuration
9
Memory Organization
10
Resets
11
OSC - Oscillator Module (With Fail-Safe Clock Monitor)
12
INT - Interrupts
13
Power-Saving Modes
14
WWDT - Windowed Watchdog Timer
15
NVM - Nonvolatile Memory Control
16
I/O Ports
17
IOC - Interrupt-on-Change
18
PPS - Peripheral Pin Select Module
19
CRC - Cyclic Redundancy Check Module with Memory Scanner
20
PMD - Peripheral Module Disable
21
CLKREF - Reference Clock Output Module
22
TMR0 - Timer0 Module
23
TMR1 - Timer1 Module with Gate Control
24
TMR2 - Timer2 Module
25
NCO - Numerically Controlled Oscillator Module
26
CWG - Complementary Waveform Generator Module
27
CCP - Capture/Compare/PWM Module
28
Capture, Compare, and PWM Timers Selection
29
PWM - Pulse-Width Modulator with Compare
30
CLC - Configurable Logic Cell
31
MSSP - Host Synchronous Serial Port Module
31.1
SPI Mode Overview
31.2
I
2
C Mode Overview
31.2.1
I
2
C Mode Registers
31.2.2
I
2
C Mode Operation
31.2.3
I
2
C Client Mode Operation
31.2.4
I
2
C Host Mode
31.2.4.1
I
2
C Host Mode Operation
31.2.4.1.1
Clock Arbitration
31.2.4.1.2
WCOL Status Flag
31.2.4.1.3
I
2
C Host Mode Start Condition Timing
31.2.4.1.4
I
2
C Host Mode Repeated Start Condition Timing
31.2.4.1.5
Acknowledge Sequence Timing
31.2.4.1.6
Stop Condition Timing
31.2.4.1.7
Sleep Operation
31.2.4.1.8
Effects of a Reset
31.2.4.2
I
2
C Host Mode Transmission
31.2.4.3
I
2
C Host Mode Reception
31.2.5
Multi-Host Mode
31.3
Baud Rate Generator
31.4
Register Definitions: MSSP Control
31.5
Register Summary - MSSP Control
32
EUSART - Enhanced Universal Synchronous Asynchronous Receiver Transmitter
33
ADC - Analog-to-Digital Converter with Computation Module
34
OPA - Operational Amplifier
35
DAC - Digital-to-Analog Converter Module
36
CMP - Comparator Module
37
FVR - Fixed Voltage Reference
38
Temperature Indicator Module
39
ZCD - Zero-Cross Detection Module
40
Charge Pump
41
Instruction Set Summary
42
ICSP™ - In-Circuit Serial Programming™
43
Register Summary
44
Electrical Specifications
45
DC and AC Characteristics Graphs and Tables
46
Packaging Information
47
Appendix A: Revision History
Microchip Information
31.2.4.1.8 Effects of a Reset
A Reset disables the MSSP module and terminates the current transfer.
