16.13.3 DMAnCON1

DMA Control Register 1

Name:	DMAnCON1
Address:	0x055


Bit	7	6	5	4	3	2	1	0
	DMODE[1:0]		DSTP	SMR[1:0]		SMODE[1:0]		SSTP
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:6 – DMODE[1:0] Destination Address Mode Selection

Value	Description
11	Reserved, do not use
10	Destination Pointer (DMADPTR) is decremented after each transfer
01	Destination Pointer (DMADPTR) is incremented after each transfer
00	Destination Pointer (DMADPTR) remains unchanged after each transfer

Bit 5 – DSTP Destination Counter Reload Stop

Value	Description
1	SIRQEN bit is cleared when destination counter reloads
0	SIRQEN bit is not cleared when destination counter reloads

Bits 4:3 – SMR[1:0] Source Memory Region Selection

Value	Description
1x	Data EEPROM is selected as the DMA source memory
01	Program Flash Memory is selected as the DMA source memory
00	SFR/GPR data space is selected as the DMA source memory

Bits 2:1 – SMODE[1:0] Source Address Mode Selection

Value	Description
11	Reserved, do not use
10	Source Pointer (DMASPTR) is decremented after each transfer
01	Source Pointer (DMASPTR) is incremented after each transfer
00	Source Pointer (DMASPTR) remains unchanged after each transfer

Bit 0 – SSTP Source Counter Reload Stop

Value	Description
1	SIRQEN bit is cleared when source counter reloads
0	SIRQEN bit is not cleared when source counter reloads

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