22.2 PPS Inputs

Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below).

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS register.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Table 22-1. PPS Input Selection Table
PeripheralPPS Input Register 14-Pin Devices20-Pin Devices
Default Pin Selection at PORRegister Reset Value at PORAvailable Input PortDefault Pin Selection at PORRegister Reset Value at PORAvailable Input Port
Interrupt 0INT0PPSRA2‘b000 010A—CWRA2‘b000 010ABCW
Interrupt 1INT1PPSRA4‘b000 100A—CWRA4‘b000 100ABCW
Interrupt 2INT2PPSRA5‘b000 101A—CWRA5‘b000 101ABCW
Timer0 ClockT0CKIPPSRA2‘b000 010A—CWRA2‘b000 010ABCW
Timer1 ClockT1CKIPPSRA5‘b000 101A—CWRA5‘b000 101ABCW
Timer1 GateT1GPPSRA4‘b000 100A—CWRA4‘b000 100ABCW
Timer2 InputT2INPPSRA5‘b000 101A—CWRA5‘b000 101ABCW
Timer4 InputT4INPPSRC1‘b010 001A—CWRC1‘b010 001ABCW
Universal Timer Input 0TUIN0PPSRA1‘b000 001A—CWRA1‘b000 001ABCW
Universal Timer Input 1TUIN1PPSRC0‘b010 000A—CWRC0‘b010 000ABCW
CCP1CCP1PPSRC5‘b010 101A—CWRC5‘b010 101ABCW
CCP2CCP2PPSRC3‘b010 011A—CWRC3‘b010 011ABCW
PWM Input 0PWMIN0PPSRC5‘b010 101A—CWRC5‘b010 101ABCW
PWM Input 1PWMIN1PPSRC3‘b010 011A—CWRC3‘b010 011ABCW
PWM1 External Reset SourcePWM1ERSPPSRA5‘b000 101A—CWRA5‘b000 101ABCW
PWM2 External Reset SourcePWM2ERSPPSRC1‘b010 001A—CWRC1‘b010 001ABCW
CWG1CWG1PPSRA2‘b000 010A—C—RA2‘b000 010ABC—
CLCx Input 1CLCIN0PPSRC3‘b010 011A—CWRA2‘b000 010ABCW
CLCx Input 2CLCIN1PPSRC4‘b010 100A—CWRC3‘b010 011ABCW
CLCx Input 3CLCIN2PPSRC1‘b010 001A—CWRB6‘b001 110ABCW
CLCx Input 4CLCIN3PPSRA5‘b000 101A—CWRB5‘b001 101ABCW
UART1 ReceiveU1RXPPSRC5‘b010 101A—CWRB5‘b001 101ABCW
UART1 Clear to SendU1CTSPPSRC4‘b010 100A—C—RB7‘b001 111ABC—
UART2 ReceiveU2RXPPSRC1‘b010 001A—CWRC1‘b010 001ABCW
UART2 Clear to SendU2CTSPPSRC0‘b010 000A—C—RC0‘b010 000ABC—
SPI1 ClockSPI1SCKPPSRC0‘b010 000A—CWRB6‘b001 110ABCW
SPI1 DataSPI1SDIPPSRC1‘b010 001A—CWRB5‘b001 101ABCW
SPI1 Client SelectSPI1SSPPSRC3‘b010 011A—CWRC6‘b010 110ABCW
I2C1 ClockI2C1SCLPPS(1)RC0‘b010 000A—C—RB6‘b001 110ABC—
I2C1 DataI2C1SDAPPS(1)RC1‘b010 001A—C—RB5‘b001 101ABC—
ADC Auto-Conversion TriggerADACTPPSRC3‘b010 011A—CWRC3‘b010 011ABCW
Note:
  1. Bidirectional pin. The corresponding output must select the same pin.