30.5.1 CCPxCON
Note:
- The set and clear operations of
the Compare mode are reset by setting MODE =
‘b0000or EN =0. - When MODE =
‘b0001or‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.
| Name: | CCPxCON |
| Address: | 0x14B,0x14F |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EN | OUT | FMT | MODE[3:0] | ||||||
| Access | R/W | R | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | x | 0 | 0 | 0 | 0 | 0 | ||
Bit 7 – EN CCP Module Enable
| Value | Description |
|---|---|
| 1 | CCP is enabled |
| 0 | CCP is disabled |
Bit 5 – OUT CCP Output Data (read-only)
Bit 4 – FMT CCPxRH:L Value Alignment (PWM mode)
| Value | Name | Description |
|---|---|---|
| x | Capture mode | Not used |
| x | Compare mode | Not used |
| 1 | PWM mode | Left aligned format |
| 0 | PWM mode | Right aligned format |
Bits 3:0 – MODE[3:0] CCP Mode Select
| Value | Description | Set CCPxIF | |
|---|---|---|---|
11xx | PWM mode, PWM operation | Yes | |
1011 | Compare mode, Pulse output; clear TMR1(2) | Yes | |
1010 | Compare mode, Pulse output | Yes | |
1001 | Compare mode,Clear output(1) | Yes | |
1000 | Compare mode, Set output(1) | Yes | |
0111 | Capture mode, Every 16th rising edge of CCPx input | Yes | |
0110 | Capture mode, Every 4th rising edge of CCPx input | Yes | |
0101 | Capture mode, Every rising edge of CCPx input | Yes | |
0100 | Capture mode, Every falling edge of CCPx input | Yes | |
0011 | Capture mode, Every edge of CCPx input | Yes | |
0010 | Compare mode,Toggle output | Yes | |
0001 | Compare mode,Toggle output; clear TMR1(2) | Yes | |
0000 | Disabled | — | |
