38.5 Power Consumption

The values in the below table are measured values of power consumption under the following conditions, except where noted:

Operating conditions
- V_VDDIN = 3.3 V
Wake up time from sleep mode is measured from the edge of the wakeup signal to the execution of the first instruction fetched in flash.
Oscillators
- XOSC32K (32 kHz crystal oscillator) stopped
- XOSC (crystal oscillator) running with external 32MHz clock on XIN
- DFLL48M stopped
Clocks
- XOSC used as main clock source, except otherwise specified
- CPU, AHB clocks undivided
- APBA clock divided by 4
- APBB and APBC bridges off
The following AHB module clocks are running: NVMCTRL, APBA bridge
- All other AHB clocks stopped
The following peripheral clocks running: PM, SYSCTRL, RTC
- All other peripheral clocks stopped
I/Os are inactive with internal pull-up
CPU is running on flash with 1 wait states
Cache enabled
BOD33 disabled

Table 38-5. Current Consumption (Silicon Revisions A, B, C, D, E, and F)
Mode	Conditions	T_A	Min.	Typ.	Max.	Units
ACTIVE	CPU running a While(1) algorithm	105°C	-	2.55	2.75	mA
	CPU running a While(1) algorithm V_DDIN=1.8V, CPU is running on Flash with 3 wait states		-	2.56	2.82	mA
	CPU running a While(1) algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference		-	42*freq +318	42*freq +432	μA (with freq in MHz)
	CPU running a Fibonacci algorithm		-	4.21	4.59	mA
	CPU running a Fibonacci algorithm V_DDIN=1.8V, CPU is running on flash with 3 wait states		-	4.23	4.57	mA
	CPU running a Fibonacci algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference		-	80*freq +320	82*freq +432	μA (with freq in MHz)
	CPU running a CoreMark algorithm		-	6.02	6.54	mA
	CPU running a CoreMark algorithm V_DDIN=1.8V, CPU is running on flash with 3 wait states		-	5.21	5.57	mA
	CPU running a CoreMark algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference		-	96*freq +322	98*freq +432	μA (with freq in MHz)
IDLE0			-	1.55	1.62	mA
IDLE1			-	1.13	1.18
IDLE2			-	0.96	1.01
STANDBY (rev. E silicon)	XOSC32K running  / RTC running at 1kHz⁽¹⁾	105°C	-	214	627	μA
STANDBY (rev. E silicon)	XOSC32K and RTC stopped ⁽¹⁾	105°C	-	212	624	μA
STANDBY (rev. F silicon)	XOSC32K running  / RTC running at 1kHz ⁽¹⁾	105°C	-	175	452	μA
STANDBY (rev. F silicon)	XOSC32K and RTC stopped ⁽¹⁾	105°C	-	173	450	μA

Note:

Table 38-6. Current Consumption (Silicon Revision G)
Mode	conditions	Ta	Vcc	Typ.	Max.	Units
ACTIVE	CPU running a While 1 algorithm	105°C	3.3V	3.3	3.6	mA
	CPU running a While 1 algorithm	105°C	1.8V	3.3	3.6
	CPU running a While 1 algorithm, with GCLKIN as reference	105°C	3.3V	56*Freq+254	55*Freq+596
	CPU running a Fibonacci algorithm	105°C	3.3V	4.2	4.6
	CPU running a Fibonacci algorithm	105°C	1.8V	4.3	4.7
	CPU running a Fibonacci algorithm, with GCLKIN as reference	105°C	3.3V	75*Freq+254	73*Freq+594
	CPU running a CoreMark algorithm	105°C	3.3V	4.9	5.4
	CPU running a CoreMark algorithm	105°C	1.8V	4.7	5.1
	CPU running a CoreMark algorithm, with GCLKIN as reference	105°C	3.3V	87*Freq+257	86*Freq+597
IDLE0		105°C	3.3V	1.8	2.1
IDLE1		105°C	3.3V	1.2	1.5
IDLE2		105°C	3.3V	1.0	1.2
STANDBY	XOSC32K running, RTC running at 1kHz RTC running at 1kHz ⁽¹⁾	105°C	3.3V	175.0	452.0	µA
STANDBY	XOSC32K and RTC stopped ⁽¹⁾	105°C	3.3V	173.0	450.0	µA

Note: Measurements done with VREG.bit.RUNSTDBY = 1.

Table 38-7. Wake-up Time
Mode	Conditions	T_A	Min.	Typ.	Max.	Units
IDLE0	OSC8M used as main clock source, Cache disabled	105°C	3.8	4	4.1	μs
IDLE1	OSC8M used as main clock source, Cache disabled		12.8	14.3	15.7
IDLE2	OSC8M used as main clock source, Cache disabled		13.7	15.2	16.6
STANDBY	OSC8M used as main clock source, Cache disabled		18.7	20.1	21.6

SAM D21/DA1 Family