29.1 Overview

The Inter-IC Sound Controller (I²S) provides bidirectional, synchronous and digital audio link with external audio devices.

This controller is compliant with the Inter-IC Sound (I²S) bus specification. It supports TDM interface with external multi-slot audio codecs. It also supports Pulse Density Modulation (PDM) interface with external MEMS microphones.

The I²S consists of two Clock Units and two Serializers, that can be enabled separately, to provide Host, Client, or controller modes, and operate as Receiver or Transmitter.

The pins associated with I²S peripheral are SDm, FSn, SCKn, and MCKn pins, where n=[0,1] denotes the Clock Unit and m=[0,1] is the Serializers instance.

FSn is referred to as Word Select in standard I²S mode operation and as Frame Sync in TDM mode. Peripheral DMAC channels, separate for each Serializer, allow a continuous high bitrate data transfer without processor intervention to the following:

• Audio codecs in Host, Client, or Controller mode
• Stereo DAC or ADC through dedicated I²S serial interface
• Multi-slot or multiple stereo DACs or ADCs, using the TDM format
• Mono or stereo MEMS microphones, using the PDM interface
• 1-channel burst transfer with non-periodic Frame Sync

Each Serializer supports using either a single DMAC channel for all data channels, or two separate DMAC channels for different data channels.

The I²S supports 8-bit and 16-bit compact stereo format. This helps in reducing the required DMA bandwidth by transferring the left and right samples within the same data word.

Usually, an external audio codec or digital signal processor (DSP) requires a clock which is a multiple of the sampling frequency fs (for example, 384×fs). The I²S peripheral in Host Mode and Controller mode is capable of outputting an output clock ranging from 16×fs to 1024×fs on the Host Clock pin (MCKn).