6 Appendix: Schematics

This section contains the following schematics:

Figure 6-1. Block Diagram

Figure 6-2. PIO Muxing and Jumper Settings Schematic

Figure 6-3. Power Inputs Schematic

Figure 6-4. Power Management Schematic

Figure 6-5. MPU Clocks Power System Ports Schematic

Figure 6-6. MPU External Memory Controller and Device Schematic

Figure 6-7. PIO Assignment and FLEXCOM Distribution Schematic

Figure 6-8. SD Card, NAND Flash, QSPI, EEPROM Memory Schematic

Figure 6-9. M.2 Interface Schematic

Figure 6-10. On-Board 10/100/1000 Ethernet Interface Schematic

Figure 6-11. 10/100/1000 SODIMM Ethernet Interface Schematic

Figure 6-12. MIPI DSI, LVDS Interfaces, RPi 40-Pin Connector Schematic

Figure 6-13. USB Interface Schematic

Figure 6-14. mikroBUS 1, mikroBUS 2, CAN Interface Schematic

Figure 6-15. User, Debug Interface, Tamper, System Connectors Schematic

Figure 6-16. Top Assembly Drawing

Figure 6-17. Bottom Assembly Drawing