34.7.5.13 Debug Control
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | DBGCTRL |
Offset: | 0x30 |
Reset: | 0x00 |
Property: | PAC Write-Protection |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DBGSTOP | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit 0 – DBGSTOP Debug Stop Mode
This bit controls the functionality when the CPU is halted by an external debugger.
Value | Description |
---|---|
0 | The baud-rate generator continues normal operation when the CPU is halted by an external debugger. |
1 | The baud-rate generator is halted when the CPU is halted by an external debugger. |