2 Configuration Summary

SAM L21JSAM L21GSAM L21E
Pins644832
General Purpose I/O-pins (GPIOs)513725
Flash256/128/64-KB256/128/64-KB256/128/64/32-KB
Flash RWW section8/4/2-KB8/4/2-KB8/4/2/1-KB
System SRAM32/16/8-KB32/16/8-KB32/16/8/4-KB
Low-power SRAM8/8/4-KB8/8/4-KB8/8/4/2-KB
Timer Counter (TC) instances(1)533
Waveform output channels per TC instance222
Timer Counter for Control (TCC) instances333
Waveform output channels per TCC8/4/28/4/26/4/2
DMA channels161616
USB interface111
AES engine111
Configurable Custom Logic (CCL) (LUTs)444
True Random Generator (TRNG)111
Serial Communication Interface (SERCOM) instances 666
Analog-to-Digital Converter (ADC) channels201410
Analog Comparators (AC)222
Digital-to-Analog Converter (DAC) channels222
Operational Amplifier (OPAMP)333
Real-Time Counter (RTC)YesYesYes
RTC alarms111
RTC compare values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values

External Interrupt lines161616
Peripheral Touch Controller (PTC) channels (X- x Y-Lines) for mutual capacitance (2)

169 (13x13)

81 (9x9)

42 (7x6)

Peripheral Touch Controller (PTC) channels for self capacitance (Y-Lines only) (3)16107
Maximum CPU frequency48 MHz
Packages

QFN

TQFP

WLCSP(4)

QFN

TQFP

QFN

TQFP

Oscillators

32.768 kHz crystal oscillator (XOSC32K)

0.4-32 MHz crystal oscillator (XOSC)

32.768 kHz internal oscillator (OSC32K)

32 KHz ultra low-power internal oscillator (OSCULP32K)

16/12/8/4-MHz high-accuracy internal oscillator (OSC16M)

48 MHz Digital Frequency Locked Loop (DFLL48M)

96 MHz Fractional Digital Phased Locked Loop (FDPLL96M)

Event System channels121212
SW Debug InterfaceYesYesYes
Watchdog Timer (WDT)YesYesYes
Note:
  1. For SAM L21E and SAM L21G devices, only TC0, TC1 and TC4 are available.
  2. The number of X-lines and Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. Refer to Multiplexed Signals for additional information. The number in the configuration summary is the maximum number of channels that can be obtained.
  3. The number of Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. The number given here is the maximum number of Y-lines that can be obtained.
  4. WLCSP parts are programmed with a specific SPI bootloader. Refer to the Application Note “AT09002” for additional information.