Features

  • Processor
    • Arm Cortex-M0+ CPU running at up to 48 MHz
      • Single-cycle hardware multiplier
      • Micro Trace Buffer
  • Memories
    • 32/64/128/256-KB in-system self-programmable Flash
    • 1/2/4/8-KB Flash Read-While-Write section
    • 4/8/16/32-KB SRAM main memory
    • 2/4/8/8-KB SRAM low-power memory
  • System
    • Power-on Reset (POR) and Brown-out Detection (BOD)
    • Internal and external clock options
    • External Interrupt Controller (EIC)
    • 16 external interrupts
    • One non-maskable interrupt
    • Two-pin Serial Wire Debug (SWD) programming, testing, and debugging interface
  • Low Power
    • Idle, Stand-by, Backup, and Off Sleep modes
    • SleepWalking peripherals
    • Static and Dynamic Power Gating Architecture
    • Battery backup support
    • Two performance levels
    • Embedded Buck/LDO regulator supporting on-the-fly selection
  • Peripherals
    • 16-channel Direct Memory Access Controller (DMAC)
    • 12-channel Event System
    • Up to five 16-bit Timer/Counters (TC) including one low-power TC, each configurable as:
      • 16-bit TC with two compare/capture channels
      • 8-bit TC with two compare/capture channels
      • 32-bit TC with two compare/capture channels, by using two TCs
    • Two 24-bit and one 16-bit Timer/Counters for Control (TCC), with extended functions:
      • Up to four compare channels with optional complementary output
      • Generation of synchronized pulse width modulation (PWM) pattern across port pins
      • Deterministic fault protection, fast decay and configurable dead-time between complementary output
      • Dithering that increase resolution with up to 5 bit and reduce quantization error
    • PWM Outputs using TC and TCC peripherals:
      • Up to four PWM channels on each 24-bit TCC
      • Up to two PWM channels on each 16-bit TC
    • 32-bit Real Time Counter (RTC) with clock/calendar function
    • Watchdog Timer (WDT)
    • CRC-32 generator
    • One full-speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface
      • Embedded host and device function
      • Eight endpoints
    • Up to six Serial Communication Interfaces (SERCOM) including one low-power SERCOM, each configurable to operate as either:
      • USART with full-duplex and single-wire half-duplex configuration
      • I2C up to 3.4 MHz
      • SPI
      • LIN Client
    • One AES encryption engine
    • One True Random Generator (TRNG)
    • One Configurable Custom Logic (CCL)
    • One 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 20 channels
      • Differential and single-ended input
      • Automatic offset and gain error compensation
      • Oversampling and decimation in hardware to support 13-bit, 14-bit, 15-bit, or 16-bit resolution
    • Two 12-bit, 1 Msps dual output Digital-to-Analog Converter (DAC)
    • Two Analog Comparators (AC) with window compare function
    • Three Operational Amplifiers (OPAMP)
    • Peripheral Touch Controller (PTC)
      • 169-channel capacitive touch and proximity sensing
      • Wake up on touch in Standby mode
  • Oscillators
    • 32.768 kHz crystal oscillator (XOSC32K)
    • 0.4-32 MHz crystal oscillator (XOSC)
    • 32.768 kHz internal oscillator (OSC32K)
    • 32.768 kHz ultra-low power internal oscillator (OSCULP32K)
    • 16/12/8/4 MHz high-accuracy internal oscillator (OSC16M)
    • 48 MHz Digital Frequency Locked Loop (DFLL48M)
    • 96 MHz Fractional Digital Phased Locked Loop (FDPLL96M)
  • I/O
    • Up to 51 programmable I/O pins
  • Easy migration from the SAM D family of devices
  • Packages
    • 64-pin TQFP, QFN, WLCSP
    • 48-pin TQFP, QFN
    • 32-pin TQFP, QFN
  • Operating voltage
    • 1.62V – 3.63V
  • Temperature range
    • -40°C to 85°C
    • -40°C to 105°C