41.6.4 USB Transfer Event Definitions

A transfer is composed of one or several transactions as shown in the table below.

Table 41-2. USB Transfer Events
TransferTransaction
DirectionType
CONTROL (bidirectional)Control Transfer (1)
  • Setup transaction → Data IN transactions → Status OUT transaction
  • Setup transaction → Data OUT transactions → Status IN transaction
  • Setup transaction → Status IN transaction
IN (device toward host)Bulk IN Transfer
  • Data IN transaction → Data IN transaction
Interrupt IN Transfer
  • Data IN transaction → Data IN transaction
Isochronous IN Transfer (2)
  • Data IN transaction → Data IN transaction
OUT (host toward device)Bulk OUT Transfer
  • Data OUT transaction → Data OUT transaction
Interrupt OUT Transfer
  • Data OUT transaction → Data OUT transaction
Isochronous OUT Transfer (2)
  • Data OUT transaction → Data OUT transaction
Note:
  1. Control transfer must use endpoints with one bank and can be aborted using a stall handshake.
  2. Isochronous transfers must use endpoints configured with two or three banks.

An endpoint handles all transactions related to the type of transfer for which it has been configured.

Table 41-3. UDPHS Endpoint Description
Endpoint #MnemonicNb BanksDMAHigh BandwidthMax. Endpoint SizeEndpoint Type
0EPT_01NN64Control
1EPT_13YY1024Ctrl/Bulk/Iso(1)/Interrupt
2EPT_23YY1024Ctrl/Bulk/Iso(1)/Interrupt
3EPT_32YN1024Ctrl/Bulk/Iso(1)/Interrupt
4EPT_42YN1024Ctrl/Bulk/Iso(1)/Interrupt
5EPT_52YN1024Ctrl/Bulk/Iso(1)/Interrupt
6EPT_62YN1024Ctrl/Bulk/Iso(1)/Interrupt
7EPT_72YN1024Ctrl/Bulk/Iso(1)/Interrupt
8EPT_82NN1024Ctrl/Bulk/Iso(1)/Interrupt
9EPT_92NN1024Ctrl/Bulk/Iso(1)/Interrupt
10EPT_102NN1024Ctrl/Bulk/Iso(1)/Interrupt
11EPT_112NN1024Ctrl/Bulk/Iso(1)/Interrupt
12EPT_122NN1024Ctrl/Bulk/Iso(1)/Interrupt
13EPT_132NN1024Ctrl/Bulk/Iso(1)/Interrupt
14EPT_142NN1024Ctrl/Bulk/Iso(1)/Interrupt
15EPT_152NN1024Ctrl/Bulk/Iso(1)/Interrupt
Note:
  1. In Isochronous (Iso) mode, it is preferable that the high bandwidth capability is available.

The size of the internal DPRAM is 8 Kbytes.

Suspend and resume are automatically detected by the UDPHS device, which notifies the processor by raising an interrupt.