18.6.2.1 Initialization

The following bits are enable-protected, meaning that they can only be written when the RTC is disabled (CTRL.ENABLE=0):

Operating Mode bits in the Control register (CTRL.MODE)
Prescaler bits in the Control register (CTRL.PRESCALER)
Clear on Match bit in the Control register (CTRL.MATCHCLR)
Clock Representation bit in the Control register (CTRL.CLKREP)

The following register is enable-protected:

Event Control register (EVCTRL)

Any writes to these bits or registers when the RTC is enabled or being enabled (CTRL.ENABLE=1) will be discarded. Writes to these bits or registers while the RTC is being disabled will be completed after the disabling is complete.

Enable-protection is denoted by the "Enable-Protected" property in the register description.

Before the RTC is enabled, it must be configured, as outlined by the following steps:

RTC operation mode must be selected by writing the Operating Mode bit group in the Control register (CTRL.MODE)
Clock representation must be selected by writing the Clock Representation bit in the Control register (CTRL.CLKREP)
Prescaler value must be selected by writing the Prescaler bit group in the Control register (CTRL.PRESCALER)

The RTC prescaler divides the source clock for the RTC counter.

Note: In Clock/Calendar mode, the prescaler must be configured to provide a 1Hz clock to the counter for correct operation.

The frequency of the RTC clock (CLK_RTC_CNT) is given by the following formula:

f_{CLK_RTC_CNT} = \frac{f_{GCLK_RTC}}{2^{PRESCALER}}

The frequency of the generic clock, GCLK_RTC, is given by f_{GCLK_RTC}, and f_{CLK_RTC_CNT} is the frequency of the internal prescaled RTC clock, CLK_RTC_CNT.