3.2 Charge Pump with Internal Resistor Ladder
(LCDVSRC<3:0> = 0111
)
Setting the LCDVSRC <3:0> bits of the LCDVCON2 register to
‘0111
’ will enable the LCD driver to provide voltage from the
charge pump and the internal resistor ladder/contrast control circuit. This mode of
operation offers the functionality of the integrated LCD charge pump to generate the LCD
bias voltages, but also allows the user to utilize an internal resistor ladder to fine
tune and optimize the LCD bias voltages to meet the specific requirement of their glass.
When configured to operate in this mode, the internal LCD charge pump will generate
VLCD3, the highest of the LCD bias voltages. All other LCD bias voltages are generated
from VLCD3 using the internal resistor ladder. Contrast can be controlled in two
different ways while operating in this mode: by altering the output of the LCD Charge
pump (VLCD3) by programming the BIAS<2:0> bits, and by using the LCD Contrast
Control Bits (LCDCST) of the LCDREF register.
The internal resistor ladder used for contrast control consists of a 7-tap
resistor ladder. The resistor ladder configuration is controlled by programming the
LCDCST<2:0> bits of the LCDREF register to determine the total resistance of the
circuit used to generate the LCD bias voltages. Maximum resistance from the internal
resistor ladder (LCDCST<2:0> = 111
) results in minimum contrast,
but also the lowest power consumption of all the resistor ladder settings. Minimum
resistance from the internal resistor ladder (LCDCST<2:0> = 000
)
would provide the maximum contrast, but in turn the most power consumption due to the
increased current. It is important to take into consideration the additional power
consumption associated with making these changes to increase display contrast. This mode
is valid for the following LCD panel bias types: Static (two discrete levels), 1/2 Bias
(three discrete levels), and 1/3 Bias (four discrete levels).