1.2.2 NMV Write Error (WRERR) Bit is Incorrectly Set
If a Reset occurs while a self-write operation is in progress, the Write Error (WRERR) bit is set. If the user clears the WRERR bit and another Reset occurs, even though no self-write operation is in progress, the WRERR bit will be incorrectly set again since the internal write latch has not been cleared.
Work around
A successful write operation will clear the WRERR condition.
Affected Silicon Revisions
| A3 | A4 | A6 | |||||
| X | X | X |