Silicon Issue Summary
| Module | Feature | Item No. | Issue Summary | Affected Revisions | ||
|---|---|---|---|---|---|---|
| A3 | A4 | A6 | ||||
| Oscillator (OSC) | Fail-Safe Clock Monitor (FSCM) | 1.1.1 | The FSCM May Fail to Trigger with 4x PLL enabled | X | X | |
| Nonvolatile Memory (NVM) Control | NVMREG Access | 1.2.1 | Self-Writes on LF Devices Below 2.2V at -40°C May Not Work | X | X | |
| NVM Write Error | 1.2.2 | NVM Write Error (WRERR) Bit is Incorrectly Set | X | X | X | |
| Electrical Specifications | FVR Accuracy | 1.3.1 | FVR Output Voltage May Be Higher Than Specified in the Data Sheet | X | X | X |
| SMBus 2.0 | 1.3.2 | The Maximum VIL Level Changes when VDD is Below 4.0V at 125°C | X | X | ||
| NVM Access | 1.3.3 | NVM Access on LF Devices May Not Work at All Specified Voltage and Temperature Ranges | X | X | X | |
| Master Synchronous Serial Port (MSSP) | I2C Communication | 1.4.1 | MSSP Acknowledge Failure on LF Devices Only | X | X | |
| SPI Slave Mode | 1.4.2 | SSPBUF Transmit Shift Register May Be Corrupted Under Certain Conditions | X | X | ||
| Analog-to-Digital Converter (ADC) | Positive Voltage Reference | 1.5.1 | Using the FVR as the ADC Positive Voltage Reference Can Cause Missing Codes | X | X | |
| Auto-Conversion Trigger | 1.5.2 | Auto-Conversion Trigger Event Does Not Begin a Conversion While in Sleep | X | X | X | |
| Timer0 | Clock Source | 1.6.1 | Operation of Timer0 is Incorrect When FOSC/4 is Used as the Clock Source | X | X | |
|
Note: Only those issues indicated in the last column
apply to the current silicon revision.
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