6.4 CONFIG4

Configuration Word 4
Note:
  1. The LVP bit cannot be written (to zero) while operating from the LVP programming interface. The purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or accidentally eliminating LVP mode from the Configuration state.
  2. Once protection is enabled through ICSP or a self-write, it can only be reset through a Bulk Erase.
  3. Applicable only if SAFEN = 0.
  4. Applicable only if BBEN = 0.
  5. The BBSIZE[2:0] bits can only be changed when BBEN = 1. Once BBEN = 0, BBSIZE[2:0] can only be changed through a Bulk Erase.
  6. The maximum Boot Block size is half of the user program memory size. Any selection that will exceed the half of a device’s program memory will default to a maximum Boot Block size of half PFM. For example, all settings of BBSIZE from ‘110’ to ‘000’ for a PIC16F15213 (Max PFM = 2048 words) will result in a maximum Boot Block size of 1024 words.
Name: CONFIG4
Offset: 0x800A

Bit 15141312111098 
   LVP WRTSAF WRTCWRTB 
Access R/WR/WR/WR/W 
Reset 1111 
Bit 76543210 
 WRTAPP  SAFENBBENBBSIZE[2:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 111111 

Bit 13 – LVP  Low-Voltage Programming Enable(1)

ValueDescription
1Low-Voltage Programming is enabled. MCLR/VPP pin function is MCLR. The MCLRE bit is ignored.
0High voltage (HV) on MCLR/VPP must be used for programming

Bit 11 – WRTSAF  Storage Area Flash (SAF) Write Protection(2,3)

ValueDescription
1SAF is not write-protected
0SAF is write-protected

Bit 9 – WRTC  Configuration Registers Write Protection(2)

ValueDescription
1Configuration registers are not write-protected
0Configuration registers are write-protected

Bit 8 – WRTB  Boot Block Write Protection(2,4)

ValueDescription
1Boot Block is not write-protected
0Boot Block is write-protected

Bit 7 – WRTAPP  Application Block Write Protection(2)

ValueDescription
1Application Block is not write-protected
0Application Block is write-protected

Bit 4 – SAFEN  Storage Area Flash (SAF) Enable(2)

ValueDescription
1SAF is disabled
0SAF is enabled

Bit 3 – BBEN  Boot Block Enable(2)

ValueDescription
1Boot Block is disabled
0Boot Block is enabled

Bits 2:0 – BBSIZE[2:0]  Boot Block Size Selection(5,6)

Table 6-2. Boot Block Size
BBENBBSIZEEnd Address of Boot BlockBoot Block Size (words)

PIC16F15213

PIC16F15223

PIC16F15243

PIC16F15214

PIC16F15224

PIC16F15244

PIC16F15254

PIC16F15274

PIC16F15225

PIC16F15245

PIC16F15255

PIC16F15275

PIC16F15256

PIC16F15276

1xxx
011101FFh512
011003FFh1024
010107FFh(6)2048
01000FFFh(6)4096
00111FFFh(6)8192
00103FFFh(6)
00013FFFh(6)
00003FFFh(6)
The LVP bit cannot be written (to zero) while operating from the LVP programming interface. The purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or accidentally eliminating LVP mode from the Configuration state.Once protection is enabled through ICSP or a self-write, it can only be reset through a Bulk Erase.Applicable only if SAFEN = 0.Applicable only if BBEN = 0.The BBSIZE[2:0] bits can only be changed when BBEN = 1. Once BBEN = 0, BBSIZE[2:0] can only be changed through a Bulk Erase.The maximum Boot Block size is half of the user program memory size. Any selection that will exceed the half of a device’s program memory will default to a maximum Boot Block size of half PFM. For example, all settings of BBSIZE from ‘110’ to ‘000’ for a PIC16F15213 (Max PFM = 2048 words) will result in a maximum Boot Block size of 1024 words.