8.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot.

Table 8-1. Physical Memory Map
MemoryStart AddressSize
PIC32CX510x/WBZ35x
Boot ROM0x0000000064 KB
Boot Flash0x0080000032 KB
Embedded Program Flash0x01000000512 KB
Embedded SRAM0x2000000096 KB
Peripheral Bridge A0x40000000—
Peripheral Bridge B0x41000000
Peripheral Bridge C0x42000000
Peripheral Bridge D0x44000000
eFuse—3072 bits