30.4.1.9 Synchronous Host Reception Setup

  1. Initialize the SPxBRGH:SPxBRGL register pair and set or clear the BRG16 bit, as required, to achieve the desired baud rate.
  2. Select the receive input pin by writing the appropriate values to the RxyPPS and RXxPPS registers. Both selections may enable the same pin.
  3. Select the clock output pin by writing the appropriate values to the RxyPPS and TXxPPS registers. Both selections may enable the same pin.
  4. Clear the ANSEL bit for the RXx pin (if applicable).
  5. Enable the synchronous host serial port by setting the SYNC, SPEN and CSRC bits.
  6. Ensure that the CREN and SREN bits are cleared.
  7. If interrupts are desired, set the RCxIE bit of the PIEx register and the GIE and PEIE bits of the INTCON register.
  8. If 9-bit reception is desired, set the RX9 bit.
  9. Start reception by setting the SREN bit, or for continuous reception set the CREN bit.
  10. The RCxIF Interrupt Flag bit will be set when reception of a character is complete. An interrupt will be generated if the RCxIE enable bit was set.
  11. Read the RCxSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception.
  12. Read the 8-bit received data by reading the RCxREG register.
  13. If an overrun error occurs, clear the error by either clearing the CREN bit or by clearing the SPEN bit which resets the EUSART.
Figure 30-11. Synchronous Reception (Host Mode, SREN)