Once the read control bit is set, the CPU operation is suspended during the read and
resumes immediately after. The data is available in the very next cycle, in the NVMDATL
register; therefore, it can be read in the following instructions.
The NVMDATL register will hold this value until another read or until it is written to by
the user.
Upon completion, the RD bit is cleared by hardware.Figure 15-8. Program Flash Memory Read
Sequence
DFM Read
// This code block will read 1 word (byte) of DFM
NVMCON1bits.NVMREGS = 1; // Point to DFM
NVMADR = DFM_ADDRESS; // NVMADRH = 0x70, NVMADRL = DFM address
NVMCON1bits.RD = 1; // Initiate read cycle
MY_8BIT_VARIABLE = NVMDATL; // DFM data byte is in NVMDATL
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