36.10.1 ZCDCON

Zero-Cross Detect Control Register
Name: ZCDCON
Offset: 0x101F

Bit 76543210 
 SEN OUTPOL  INTPINTN 
Access R/WRR/WR/WR/W 
Reset 0x000 

Bit 7 – SEN Zero-Cross Detect Software Enable

This bit is ignored when the ZCD fuse is cleared.

ValueNameDescription
X ZCD Config fuse = 0

Zero-cross detect is always enabled. This bit is ignored.

1 ZCD Config fuse = 1

Zero-cross detect is enabled. ZCD pin is forced to output to source and sink current.

0 ZCD Config fuse = 1

Zero-cross detect is disabled. ZCD pin operates according to PPS and TRIS controls.

Bit 5 – OUT Zero-Cross Detect Data Output

ValueNameDescription
1 POL = 0 ZCD pin is sinking current
0 POL = 0 ZCD pin is sourcing current
1 POL = 1 ZCD pin is sourcing current
0 POL = 1 ZCD pin is sinking current

Bit 4 – POL Zero-Cross Detect Polarity

ValueDescription
1 ZCD logic output is inverted
0 ZCD logic output is not inverted

Bit 1 – INTP Zero-Cross Detect Positive-Going Edge Interrupt Enable

ValueDescription
1 The ZCDIF bit is set on low-to-high ZCD_output transition
0 The ZCDIF bit is unaffected by low-to-high ZCD_output transition

Bit 0 – INTN Zero-Cross Detect Negative-Going Edge Interrupt Enable

ValueDescription
1 The ZCDIF bit is set on high-to-low ZCD_output transition
0 The ZCDIF bit is unaffected by high-to-low ZCD_output transition