3.13 I3C Controller Driver

• struct I3C_ControllerI3CTransfer_t

  I3C Controller private write/read transfer descriptor.

• struct I3C_Controller_I2CTransfer_t

  I3C Controller legacy I2C transfer descriptor.

• struct i3c_device_desc

  I3C Target device descriptor containing device identification and configuration.

• struct i3c_i2c_device_desc

  Legacy I2C device descriptor for I2C devices on the I3C bus.

• struct I3C_Controller_CCCTargetPayload_t

  CCC target payload structure for direct CCCs.

• struct I3C_Controller_CccPayload_t

  CCC payload structure for generic CCC execution.

• struct I3C_Controller_Msg_t

  I3C message descriptor for multi-message transfers.

• struct I3C_Controller_CCCPid_t

  GETPID CCC response structure containing 48-bit Provisional ID.

• struct I3C_Controller_CccBcr_t

  GETBCR CCC response structure containing Bus Characteristics Register.

• struct I3C_Controller_CccDcr_t

  GETDCR CCC response structure containing Device Characteristics Register.

• struct I3C_Controller_CccStatusFmt

  GETSTATUS CCC response structure containing device status word.

• struct I3C_Controller_CccMwl_t

  MWL payload structure for SETMWL CCC and GETMWL CCC response containing max write length.

• struct I3C_Controller_CccMrl_t

  MRL payload structure for SETMRL CCC and GETMRL CCC response containing max read length and IBI length.

• struct I3C_Controller_CccMxdsFmt

  GETMXDS CCC response structure containing max data speed info (format 1)

• struct I3C_Controller_CccCapsFmt

  GETCAPS/GETHDRCAP CCC response structure containing capability bytes.

• union I3C_Controller_CccStatus_t

  Union for GETSTATUS CCC response formats.

• union I3C_Controller_CccCaps_t

  Union for GETCAPS CCC response formats.

• union I3C_Controller_CccMxds_t

  Union for GETMXDS CCC response formats.

• struct I3C_Controller_CccEvents_t

  Event control structure for ENEC/DISEC CCCs.

• struct I3C_Controller_CccDeftgts_t

  DEFTGTS CCC payload structure for defining target list.

• struct I3C_ControllerCommand_t

  I3C Controller Common Command Code (CCC) frame descriptor.

• union I3C_TransferCommand_t

  Transfer command register union (internal use)

• union I3C_TransferArgument_t

  Transfer argument register union (internal use)

• union I3C_ShortDataArgument_t

  Short data argument register union (internal use)

• union I3C_AddrAssignCommand_t

  Address assignment command register union (internal use)

• union I3C_ResponseData_t

  Response data register union (internal use)

• union I3C_IBIData_t

  IBI data register union (internal use)

• struct I3C_DCT_t

  Device Characteristics Table entry structure (internal use)

• struct I3C_Device_t

  Generic I3C device structure (internal use)

• struct I3C_CONTROLLER_INTERFACE

  Structure containing the function pointers of I3C Controller driver.

• typedef struct i3c_device_desc I3C_Controller_TargetDevicDesc_t

  I3C Target device descriptor containing device identification and configuration.

• typedef struct i3c_i2c_device_desc I3C_Controller_I2CDeviceDesc_t

  Legacy I2C device descriptor for I2C devices on the I3C bus.

• enum I3C_Controller_CCCRstactDefiningByte_t { I3C_CCC_RSTACT_NO_RESET = 0x00U, I3C_CCC_RSTACT_PERIPHERAL_ONLY = 0x01U, I3C_CCC_RSTACT_RESET_WHOLE_TARGET = 0x02U, I3C_CCC_RSTACT_DEBUG_NETWORK_ADAPTER = 0x03U, I3C_CCC_RSTACT_VIRTUAL_TARGET_DETECT = 0x04U, I3C_CCC_RSTACT_RETURN_TIME_TO_RESET_PERIPHERAL = 0x81U, I3C_CCC_RSTACT_RETURN_TIME_TO_WHOLE_TARGET = 0x82U, I3C_CCC_RSTACT_RETURN_TIME_FOR_DEBUG_NETWORK_ADAPTER_RESET = 0x83U, I3C_CCC_RSTACT_RETURN_VIRTUAL_TARGET_INDICATION = 0x84U }

  RSTACT CCC defining byte values for target reset actions.

• enum I3C_Controller_CccStatusFmt_t { I3C_CONTROLLER_CCC_GETSTATUS_FMT_1 = 0U }

  GETSTATUS CCC response format enumeration.

• enum I3C_Controller_CccStatusDefbyte_t { I3C_CONTROLLER_CCC_GETSTATUS_DEFBYTE_NONE = 0U }

  GETSTATUS CCC defining byte enumeration.

• enum I3C_Controller_CccCapsFmt_t { I3C_CONTROLLER_CCC_GETCAPS_FMT_1_LEN_2 = 2U, I3C_CONTROLLER_CCC_GETCAPS_FMT_1_LEN_3 = 3U, I3C_CONTROLLER_CCC_GETCAPS_FMT_1_LEN_4 = 4U }

  GETCAPS CCC response format enumeration.

• enum I3C_Controller_CccMxdsFmt_t { I3C_CONTROLLER_CCC_GETMXDS_FMT_1 = 0U }

  GETMXDS CCC response format enumeration.

• enum I3C_Controller_CccMxdsDefbyte_t { I3C_CONTROLLER_CCC_GETMXDS_DEFBYTE_NONE = 0U }

  GETMXDS CCC defining byte enumeration.

• enum I3C_Controller_CccEnttmDefbyte_t { I3C_CONTROLLER_CCC_ENTTM_DEFBYTE_NONE = 0U }

  ENTTM CCC defining byte enumeration.

• enum I3C_Controller_TranferFlags { I3C_MSG_READ = 0x10000000U, I3C_MSG_WRITE = 0x00000000U, I3C_MSG_STOP = 0x40000000U, I3C_MSG_RESTART = 0x00000000U, I3C_MSG_HDR = 0x00C00000U, I3C_MSG_PEC = 0x80000000U }

  Transfer flags for I3C message configuration.

• enum I3C_Controller_IBIType_t { I3C_IBI_TARGET_INTR = 0U, I3C_IBI_CONTROLLER_ROLE_REQUEST = 1U, I3C_IBI_HOTJOIN = 2U }

  IBI (In-Band Interrupt) type enumeration.

• enum I3C_ControllerEvent_t { I3C_CONTROLLER_EVENT_RESPONSE = 1U, I3C_CONTROLLER_EVENT_WRITE_COMPLETE = 2U, I3C_CONTROLLER_EVENT_READ_COMPLETE = 3U, I3C_CONTROLLER_EVENT_ADDR_ASSIGN = 4U, I3C_CONTROLLER_EVENT_RESET_COMPLETE = 5U, I3C_CONTROLLER_EVENT_TRANSFER_ERROR = 6U, I3C_CONTROLLER_EVENT_ABORT_DONE = 7U, I3C_CONTROLLER_EVENT_HOT_JOIN = 8U, I3C_CONTROLLER_EVENT_CONTROLLER_REQ = 9U }

  Controller event types for event callback notifications.

• enum I3C_ControllerErrorStatus_t { I3C_CONTROLLER_NO_ERR = 0xFFFFU, I3C_CONTROLLER_ERR_CRC = 0x1U, I3C_CONTROLLER_ERR_PARITY = 0x2U, I3C_CONTROLLER_ERR_FRAME = 0x3U, I3C_CONTROLLER_ERR_BROADCAST_ADDR_NACK = 0x4U, I3C_CONTROLLER_ERR_ADDR_NACK = 0x5U, I3C_CONTROLLER_ERR_OVL_URL = 0x6U, I3C_CONTROLLER_ERR_USER_ABORT = 0x8U, I3C_CONTROLLER_ERR_WR_DATA_NACK = 0x9U, I3C_CONTROLLER_ERR_GETACCCR = 0xBU, I3C_CONTROLLER_ERR_PEC = 0xCU, I3C_CONTROLLER_ERR_IBI = 0x11U }

  Controller error status codes for error callback notifications.

• enum I3C_ControllerStatus_t { I3C_CONTROLLER_OK = 0x0U, I3C_CONTROLLER_ADDR_ASSIGN = 0x1U, I3C_CONTROLLER_TRANFER_BUSY = 0x2U, I3C_CONTROLLER_ADDR_ALIGN_ERR = 0x3U, I3C_CONTROLLER_BUS_RECOV_MODE = 0x5U, I3C_CONTROLLER_ADDR_ERR = 0x6U, I3C_CONTROLLER_WRITE_LEN_ERR = 0x7U, I3C_CONTROLLER_READ_LEN_ERR = 0x8U, I3C_CONTROLLER_DEVICE_TABLE_FULL = 0x9U, I3C_CONTROLLER_TID_INVALID = 0xAU, I3C_CONTROLLER_TIMEOUT = 0xBU, I3C_CONTROLLER_ATTACH_FAIL = 0xCU, I3C_CONTROLLER_INVALID_PARAM = 0xFU }

  Controller API return status codes.

• enum I3C_ControllerState_t { I3C_CONTROLLER_IDLE = 0x00U, I3C_CONTROLLER_START = 0x01U, I3C_CONTROLLER_RESTART = 0x02U, I3C_CONTROLLER_STOP = 0x03U, I3C_CONTROLLER_TGT_START_HOLD = 0x04U, I3C_CONTROLLER_BCAST_WRITE_ADDR = 0x05U, I3C_CONTROLLER_BCAST_READ_ADDR = 0x06U, I3C_CONTROLLER_DAA = 0x07U, I3C_CONTROLLER_TARGET_ADDR = 0x08U, I3C_CONTROLLER_CCC_BYTE = 0x0BU, I3C_CONTROLLER_HDR_CMD = 0x0CU, I3C_CONTROLLER_WRITE_DATA = 0x0DU, I3C_CONTROLLER_READ_DATA = 0x0EU, I3C_CONTROLLER_IBI_SIR_READ = 0x0FU, I3C_CONTROLLER_IBI_AUTO_DISABLE = 0x10U, I3C_CONTROLLER_HDR_DDR_CRC = 0x11U, I3C_CONTROLLER_CLOCK_EXT = 0x12U, I3C_CONTROLLER_HALT = 0x13U }

  Controller state machine states.

• enum I3C_ControllerTransferState_t { I3C_CONTROLLER_TRANSFER_IDLE = 0x00U, I3C_CONTROLLER_TRANSFER_BCAST_CCC_WRITE = 0x01U, I3C_CONTROLLER_TRANSFER_DIR_CCC_WRITE = 0x02U, I3C_CONTROLLER_TRANSFER_DIR_CCC_READ = 0x03U, I3C_CONTROLLER_TRANSFER_ENTDAA = 0x04U, I3C_CONTROLLER_TRANSFER_SETDASA = 0x05U, I3C_CONTROLLER_TRANSFER_I3C_SDR_WRITE = 0x06U, I3C_CONTROLLER_TRANSFER_I3C_SDR_READ = 0x07U, I3C_CONTROLLER_TRANSFER_I2C_SDR_WRITE = 0x08U, I3C_CONTROLLER_TRANSFER_I2C_SDR_READ = 0x09U, I3C_CONTROLLER_TRANSFER_HDR_DDR_WRITE = 0x0CU, I3C_CONTROLLER_TRANSFER_HDR_DDR_READ = 0x0DU, I3C_CONTROLLER_TRANSFER_IBI_SERVICE = 0x0EU, I3C_CONTROLLER_TRANSFER_HALT = 0x0FU }

  Controller transfer state machine states.

• enum I3C_ControllerCcc_t { I3C_BCCC_ENEC = 0x00U, I3C_BCCC_DISEC = 0x01U, I3C_BCCC_ENTAS0 = 0x02U, I3C_BCCC_ENTAS1 = 0x03U, I3C_BCCC_ENTAS2 = 0x04U, I3C_BCCC_ENTAS3 = 0x05U, I3C_BCCC_RSTDAA = 0x06U, I3C_BCCC_ENTDAA = 0x07U, I3C_BCCC_DEFTGTS = 0x08U, I3C_BCCC_SETMWL = 0x09U, I3C_BCCC_SETMRL = 0x0AU, I3C_BCCC_ENTTM = 0x0BU, I3C_BCCC_SETBUSCON = 0x0CU, I3C_BCCC_ENDXFER = 0x12U, I3C_BCCC_ENTHDR0 = 0x20U, I3C_BCCC_SETXTIME = 0x28U, I3C_BCCC_SETAASA = 0x29U, I3C_BCCC_RSTACT = 0x2AU, I3C_BCCC_DEFGRPA = 0x2BU, I3C_BCCC_RSTGRPA = 0x2CU, I3C_BCCC_MLANE = 0x2DU, I3C_DCCC_ENEC = 0x80U, I3C_DCCC_DISEC = 0x81U, I3C_DCCC_ENTAS0 = 0x82U, I3C_DCCC_ENTAS1 = 0x83U, I3C_DCCC_ENTAS2 = 0x84U, I3C_DCCC_ENTAS3 = 0x85U, I3C_DCCC_SETDASA = 0x87U, I3C_DCCC_SETNEWDA = 0x88U, I3C_DCCC_SETMWL = 0x89U, I3C_DCCC_SETMRL = 0x8AU, I3C_DCCC_GETMWL = 0x8BU, I3C_DCCC_GETMRL = 0x8CU, I3C_DCCC_GETPID = 0x8DU, I3C_DCCC_GETBCR = 0x8EU, I3C_DCCC_GETDCR = 0x8FU, I3C_DCCC_GETSTATUS = 0x90U, I3C_DCCC_GETACCR = 0x91U, I3C_DCCC_ENDXFER = 0x92U, I3C_DCCC_SETBRGTGT = 0x93U, I3C_DCCC_GETMXDS = 0x94U, I3C_DCCC_GETCAPS = 0x95U, I3C_DCCC_SETROUTE = 0x96U, I3C_DCCC_SETXTIME = 0x98U, I3C_DCCC_GETXTIME = 0x99U, I3C_DCCC_RSTACT = 0x9AU, I3C_DCCC_SETGRPA = 0x9BU, I3C_DCCC_RSTGRPA = 0x9CU, I3C_DCCC_MLANE = 0x9DU }

  I3C Common Command Codes (CCC) as per MIPI I3C Specification v1.1.1.

• enum I3C_ControllerDeviceType_t { I3C_CONTROLLER_DEV_I3C = 0U, I3C_CONTROLLER_DEV_I2C = 1U }

  Device type enumeration (I3C vs legacy I2C)

• I3C_ControllerStatus_t I3C1_Controller_Initialize (void)

  Initializes the I3C1 Controller module with configured settings.

• I3C_ControllerStatus_t I3C1_Controller_Deinitialize (void)

  Deinitializes the I3C1 Controller module and releases resources.

• void I3C1_Controller_Enable (void)

  Enables the I3C1 Controller module.

• void I3C1_Controller_Disable (void)

  Disables the I3C1 Controller module.

• I3C_ControllerStatus_t I3C1_Controller_Reset (void)

  Resets all FIFOs and queues of the I3C1 Controller.

• I3C_ControllerStatus_t I3C1_Controller_RecoverBus (void)

  Attempts bus recovery via abort and resume sequence.

• uint8_t I3C1_Controller_GetTargetCount (void)

  Gets the total count of attached I3C and I2C target devices.

• I3C_Controller_TargetDevicDesc_t * I3C1_FindTargetByDynamicAddress (uint8_t dynamicAddress)

  Finds a target device by its assigned dynamic address.

• I3C_ControllerStatus_t I3C1_Controller_AttachI3CDevice (I3C_Controller_TargetDevicDesc_t *i3cTarget)

  Attaches an I3C device to the controller's device address table.

• I3C_ControllerStatus_t I3C1_Controller_AttachI2CDevice (I3C_Controller_I2CDeviceDesc_t *i2cDevice)

  Attaches an I2C device to the controller's device address table.

• I3C_ControllerStatus_t I3C1_Controller_DoDaa (uint8_t startNode, uint8_t targetCount)

  Performs Dynamic Address Assignment (DAA) for I3C target devices using ENTDAA CCC.

• I3C_ControllerStatus_t I3C_Controller_Transfer (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_Msg_t *msgs, uint8_t num_msgs)

  Performs multiple I3C transfers as a sequence of messages.

• I3C_ControllerStatus_t I3C1_Controller_I2CWrite (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

  Performs an I2C write transfer to a legacy I2C device.

• I3C_ControllerStatus_t I3C1_Controller_I2CRead (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

  Performs an I2C read transfer from a legacy I2C device.

• I3C_ControllerStatus_t I3C1_Controller_I2CWriteRead (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *writeData, size_t writeLength, uint8_t *readData, size_t readLength, uint8_t speed)

  Performs a combined I2C write-read transfer to a legacy I2C device.

• I3C_ControllerStatus_t I3C1_Controller_Write (I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

  Performs a private I3C write transfer to a target device.

• I3C_ControllerStatus_t I3C1_Controller_Read (I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

  Performs a private I3C read transfer from a target device.

• I3C_ControllerStatus_t I3C1_Controller_WriteRead (I3C_Controller_TargetDevicDesc_t *target, const void *write_buf, size_t num_write, void *read_buf, size_t num_read)

  Performs a combined I3C write-read transfer to a target device.

• I3C_ControllerStatus_t I3C1_Controller_BurstRead (I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

  Performs a burst read from consecutive registers starting at specified address.

• I3C_ControllerStatus_t I3C1_Controller_BurstWrite (I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

  Performs a burst write to consecutive registers starting at specified address.

• I3C_ControllerStatus_t I3C1_Controller_DoCcc (I3C_Controller_CccPayload_t *payload)

  Executes a generic CCC command using payload structure.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetBcr (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccBcr_t *bcr)

  Executes GETBCR CCC to retrieve Bus Characteristics Register.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetDcr (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccDcr_t *dcr)

  Executes GETDCR CCC to retrieve Device Characteristics Register.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetPid (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCPid_t *pid)

  Executes GETPID CCC to retrieve Provisional ID.

• I3C_ControllerStatus_t I3C1_Controller_CccDoRstactAll (I3C_Controller_CCCRstactDefiningByte_t action)

  Executes broadcast RSTACT CCC to all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoRstact (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCRstactDefiningByte_t action, bool get, uint8_t *data)

  Executes directed RSTACT CCC to specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoRstdaa (I3C_Controller_TargetDevicDesc_t *target)

  Executes directed RSTDAA CCC to reset dynamic address of specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoRstdaaAll (void)

  Executes broadcast RSTDAA CCC to reset dynamic addresses of all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetDasa (I3C_Controller_TargetDevicDesc_t *target, uint8_t da)

  Executes SETDASA CCC to set dynamic address from static address.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetNewda (I3C_Controller_TargetDevicDesc_t *target, uint8_t new_da)

  Executes SETNEWDA CCC to set a new dynamic address.

• I3C_ControllerStatus_t I3C1_Controller_CccDoEventsAllSet (bool enable, I3C_Controller_CccEvents_t *events)

  Executes broadcast ENEC/DISEC CCC to enable/disable events for all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoEventsSet (I3C_Controller_TargetDevicDesc_t *target, bool enable, I3C_Controller_CccEvents_t *events)

  Executes directed ENEC/DISEC CCC to enable/disable events for specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoEntas (const I3C_Controller_TargetDevicDesc_t *target, uint8_t as)

  Executes directed ENTAS CCC to enter activity state for specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoEntasAll (uint8_t as)

  Executes broadcast ENTAS CCC to enter activity state for all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetMwlAll (const I3C_Controller_CccMwl_t *mwl)

  Executes broadcast SETMWL CCC to set max write length for all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetMwl (const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMwl_t *mwl)

  Executes directed SETMWL CCC to set max write length for specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetMwl (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMwl_t *mwl)

  Executes GETMWL CCC to retrieve max write length from target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetMrlAll (const I3C_Controller_CccMrl_t *mrl, bool has_ibi_size)

  Executes broadcast SETMRL CCC to set max read length for all targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetMrl (const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMrl_t *mrl)

  Executes directed SETMRL CCC to set max read length for specific target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetMrl (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMrl_t *mrl)

  Executes GETMRL CCC to retrieve max read length from target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoEnttm (I3C_Controller_CccEnttmDefbyte_t defbyte)

  Executes ENTTM CCC to enter test mode.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetStatus (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccStatus_t *status, I3C_Controller_CccStatusFmt_t fmt, I3C_Controller_CccStatusDefbyte_t defbyte)

  Executes GETSTATUS CCC to retrieve device status from target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetCaps (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccCaps_t *caps, I3C_Controller_CccCapsFmt_t fmt, uint8_t defbyte)

  Executes GETCAPS CCC to retrieve device capabilities from target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetVendor (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len)

  Executes vendor-specific directed write CCC.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetVendor (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len, size_t *num_xfer)

  Executes vendor-specific directed read CCC.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetVendorDefbyte (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t defbyte, uint8_t *payload, size_t len, size_t *num_xfer)

  Executes vendor-specific directed read CCC with defining byte.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetVendorAll (uint8_t id, uint8_t *payload, size_t len)

  Executes vendor-specific broadcast write CCC.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetAasaAll (void)

  Executes broadcast SETAASA CCC to set all addresses to static.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetmxds (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMxds_t *caps, I3C_Controller_CccMxdsFmt_t fmt, I3C_Controller_CccMxdsDefbyte_t defbyte)

  Executes GETMXDS CCC to retrieve max data speed from target.

• I3C_ControllerStatus_t I3C1_Controller_CccDoDeftgtsAll (I3C_Controller_CccDeftgts_t *deftgts)

  Executes broadcast DEFTGTS CCC to define list of targets.

• I3C_ControllerStatus_t I3C1_Controller_CccDoSetBuscon (uint8_t *context, uint16_t length)

  Executes SETBUSCON CCC to set bus context.

• I3C_ControllerStatus_t I3C1_Controller_CccDoGetAcccr (const I3C_Controller_TargetDevicDesc_t *target, uint8_t *handoff_address)

  Executes GETACCR CCC to get accept controller role handoff address.

• uint8_t I3C1_Controller_IBIStatusRead (I3C_IBIData_t *ibiStatus)

  Reads IBI status from IBI queue (must be called in callback context)

• uint8_t I3C1_Controller_IBIDataRead (uint32_t *ibiData, uint16_t length)

  Reads IBI payload data from IBI queue (call only when IBI data length > 0)

• void I3C1_Controller_HotjoinEnable (void)

  Enables Hot-Join acceptance on the I3C bus.

• void I3C1_Controller_HotjoinDisable (void)

  Disables Hot-Join acceptance on the I3C bus.

• I3C_ControllerStatus_t I3C1_Controller_Abort (void)

  Aborts the current I3C transfer operation.

• I3C_ControllerStatus_t I3C1_Controller_AbortIsDone (void)

  Checks if abort operation has completed.

• void I3C1_Controller_Resume (void)

  Resumes I3C operations after abort.

• void I3C1_Controller_BufferResetAll (void)

  Resets all TX/RX FIFOs, command queue, response queue, and IBI queue.

• void I3C1_Controller_BusReset (void)

  Initiates target reset via I3C bus reset pattern.

• I3C_ControllerTransferState_t I3C1_Controller_GetTransferState (void)

  Gets the current transfer state of the controller.

• I3C_ControllerState_t I3C1_Controller_GetCurrentState (void)

  Gets the current state of the controller state machine.

• uint8_t I3C1_Controller_ReadResponse (I3C_ResponseData_t *response)

  Reads the most recent response from response queue.

• void I3C1_Controller_EventCallback (I3C_ControllerEvent_t event)

  Default event callback handler (weak implementation)

• void I3C1_Controller_EventCallbackRegister (void(*handler)(I3C_ControllerEvent_t))

  Registers a custom event callback handler.

• void I3C1_Controller_IBICallback (uint8_t dynamicAddress, uint8_t ibiLength, uint8_t *payload)

  Default IBI callback handler (weak implementation)

• void I3C1_Controller_IBICallbackRegister (void(*handler)(uint8_t dynamicAddress, uint8_t ibiLength, uint8_t *payload))

  Registers a custom IBI callback handler.

• void I3C1_Controller_ErrorCallback (I3C_ControllerErrorStatus_t error)

  Default error callback handler (weak implementation)

• void I3C1_Controller_ErrorCallbackRegister (void(*handler)(I3C_ControllerErrorStatus_t))

  Registers a custom error callback handler.

• void I3C1_Controller_SECCCallback (void)

  Default single-bit ECC error callback handler (weak implementation)

• void I3C1_Controller_SECCCallbackRegister (void(*handler)(void))

  Registers a custom single-bit ECC error callback handler.

• void I3C1_Controller_DECCCallback (void)

  Default double-bit ECC error callback handler (weak implementation)

• void I3C1_Controller_DECCCallbackRegister (void(*handler)(void))

  Registers a custom double-bit ECC error callback handler.

• I3C_ControllerStatus_t I3C1_Controller_IBIEnable (I3C_Controller_TargetDevicDesc_t *target)

  Enables In-Band Interrupt (IBI) for a specific target device.

• I3C_ControllerStatus_t I3C1_Controller_IBIDisable (I3C_Controller_TargetDevicDesc_t *target)

  Disables In-Band Interrupt (IBI) for a specific target device.

• I3C_ControllerStatus_t I3C1_Controller_IBIHotJoinResponse (bool ack)

  Configures Hot-Join response behavior for the controller.

• const struct I3C_CONTROLLER_INTERFACE I3C1_Controller

  Structure object of type I3C_CONTROLLER_INTERFACE with the custom name given by the user in the Melody Driver User interface. The default name e.g. I3C1_Controller can be changed by the user in the I3C user interface. This allows defining a structure with application specific name using the 'Custom Name' field. Application specific name allows the API Portability.

• I3C_Controller_TargetDevicDesc_t initI3CTargets []

  Array of I3C target device descriptors initialized from UI configuration.

• I3C_Controller_I2CDeviceDesc_t initI2CTargets []

  Array of I2C target device descriptors initialized from UI configuration.

typedef struct i3c_i2c_device_desc I3C_Controller_I2CDeviceDesc_t

Legacy I2C device descriptor for I2C devices on the I3C bus.

typedef struct i3c_device_desc I3C_Controller_TargetDevicDesc_t

I3C Target device descriptor containing device identification and configuration.

I3C_ControllerStatus_t I3C1_Controller_Abort (void )

Aborts the current I3C transfer operation.

I3C_ControllerStatus_t I3C1_Controller_AbortIsDone (void )

Checks if abort operation has completed.

I3C_ControllerStatus_t I3C1_Controller_AttachI2CDevice (I3C_Controller_I2CDeviceDesc_t * i2cDevice)

Attaches an I2C device to the controller's device address table.

I3C_ControllerStatus_t I3C1_Controller_AttachI3CDevice (I3C_Controller_TargetDevicDesc_t * i3cTarget)

Attaches an I3C device to the controller's device address table.

void I3C1_Controller_BufferResetAll (void )

Resets all TX/RX FIFOs, command queue, response queue, and IBI queue.

I3C_ControllerStatus_t I3C1_Controller_BurstRead (I3C_Controller_TargetDevicDesc_t * target, uint8_t start_addr, uint8_t * buf, uint32_t num_bytes)

Performs a burst read from consecutive registers starting at specified address.

I3C_ControllerStatus_t I3C1_Controller_BurstWrite (I3C_Controller_TargetDevicDesc_t * target, uint8_t start_addr, uint8_t * buf, uint32_t num_bytes)

Performs a burst write to consecutive registers starting at specified address.

void I3C1_Controller_BusReset (void )

Initiates target reset via I3C bus reset pattern.

I3C_ControllerStatus_t I3C1_Controller_CccDoDeftgtsAll (I3C_Controller_CccDeftgts_t * deftgts)

Executes broadcast DEFTGTS CCC to define list of targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoEntas (const I3C_Controller_TargetDevicDesc_t * target, uint8_t as)

Executes directed ENTAS CCC to enter activity state for specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoEntasAll (uint8_t as)

Executes broadcast ENTAS CCC to enter activity state for all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoEnttm (I3C_Controller_CccEnttmDefbyte_t defbyte)

Executes ENTTM CCC to enter test mode.

I3C_ControllerStatus_t I3C1_Controller_CccDoEventsAllSet (bool enable, I3C_Controller_CccEvents_t * events)

Executes broadcast ENEC/DISEC CCC to enable/disable events for all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoEventsSet (I3C_Controller_TargetDevicDesc_t * target, bool enable, I3C_Controller_CccEvents_t * events)

Executes directed ENEC/DISEC CCC to enable/disable events for specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetAcccr (const I3C_Controller_TargetDevicDesc_t * target, uint8_t * handoff_address)

Executes GETACCR CCC to get accept controller role handoff address.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetBcr (I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccBcr_t * bcr)

Executes GETBCR CCC to retrieve Bus Characteristics Register.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetCaps (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccCaps_t * caps, I3C_Controller_CccCapsFmt_t fmt, uint8_t defbyte)

Executes GETCAPS CCC to retrieve device capabilities from target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetDcr (I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccDcr_t * dcr)

Executes GETDCR CCC to retrieve Device Characteristics Register.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetMrl (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccMrl_t * mrl)

Executes GETMRL CCC to retrieve max read length from target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetMwl (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccMwl_t * mwl)

Executes GETMWL CCC to retrieve max write length from target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetmxds (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccMxds_t * caps, I3C_Controller_CccMxdsFmt_t fmt, I3C_Controller_CccMxdsDefbyte_t defbyte)

Executes GETMXDS CCC to retrieve max data speed from target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetPid (I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CCCPid_t * pid)

Executes GETPID CCC to retrieve Provisional ID.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetStatus (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CccStatus_t * status, I3C_Controller_CccStatusFmt_t fmt, I3C_Controller_CccStatusDefbyte_t defbyte)

Executes GETSTATUS CCC to retrieve device status from target.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetVendor (const I3C_Controller_TargetDevicDesc_t * target, uint8_t id, uint8_t * payload, size_t len, size_t * num_xfer)

Executes vendor-specific directed read CCC.

I3C_ControllerStatus_t I3C1_Controller_CccDoGetVendorDefbyte (const I3C_Controller_TargetDevicDesc_t * target, uint8_t id, uint8_t defbyte, uint8_t * payload, size_t len, size_t * num_xfer)

Executes vendor-specific directed read CCC with defining byte.

I3C_ControllerStatus_t I3C1_Controller_CccDoRstact (const I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_CCCRstactDefiningByte_t action, bool get, uint8_t * data)

Executes directed RSTACT CCC to specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoRstactAll (I3C_Controller_CCCRstactDefiningByte_t action)

Executes broadcast RSTACT CCC to all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoRstdaa (I3C_Controller_TargetDevicDesc_t * target)

Executes directed RSTDAA CCC to reset dynamic address of specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoRstdaaAll (void )

Executes broadcast RSTDAA CCC to reset dynamic addresses of all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetAasaAll (void )

Executes broadcast SETAASA CCC to set all addresses to static.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetBuscon (uint8_t * context, uint16_t length)

Executes SETBUSCON CCC to set bus context.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetDasa (I3C_Controller_TargetDevicDesc_t * target, uint8_t da)

Executes SETDASA CCC to set dynamic address from static address.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetMrl (const I3C_Controller_TargetDevicDesc_t * target, const I3C_Controller_CccMrl_t * mrl)

Executes directed SETMRL CCC to set max read length for specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetMrlAll (const I3C_Controller_CccMrl_t * mrl, bool has_ibi_size)

Executes broadcast SETMRL CCC to set max read length for all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetMwl (const I3C_Controller_TargetDevicDesc_t * target, const I3C_Controller_CccMwl_t * mwl)

Executes directed SETMWL CCC to set max write length for specific target.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetMwlAll (const I3C_Controller_CccMwl_t * mwl)

Executes broadcast SETMWL CCC to set max write length for all targets.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetNewda (I3C_Controller_TargetDevicDesc_t * target, uint8_t new_da)

Executes SETNEWDA CCC to set a new dynamic address.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetVendor (const I3C_Controller_TargetDevicDesc_t * target, uint8_t id, uint8_t * payload, size_t len)

Executes vendor-specific directed write CCC.

I3C_ControllerStatus_t I3C1_Controller_CccDoSetVendorAll (uint8_t id, uint8_t * payload, size_t len)

Executes vendor-specific broadcast write CCC.

void I3C1_Controller_DECCCallback (void )

Default double-bit ECC error callback handler (weak implementation)

void I3C1_Controller_DECCCallbackRegister (void(*)(void) handler)

Registers a custom double-bit ECC error callback handler.

I3C_ControllerStatus_t I3C1_Controller_Deinitialize (void )

Deinitializes the I3C1 Controller module and releases resources.

void I3C1_Controller_Disable (void )

Disables the I3C1 Controller module.

I3C_ControllerStatus_t I3C1_Controller_DoCcc (I3C_Controller_CccPayload_t * payload)

Executes a generic CCC command using payload structure.

I3C_ControllerStatus_t I3C1_Controller_DoDaa (uint8_t startNode, uint8_t targetCount)

Performs Dynamic Address Assignment (DAA) for I3C target devices using ENTDAA CCC.

void I3C1_Controller_Enable (void )

Enables the I3C1 Controller module.

void I3C1_Controller_ErrorCallback (I3C_ControllerErrorStatus_t error)

Default error callback handler (weak implementation)

void I3C1_Controller_ErrorCallbackRegister (void(*)(I3C_ControllerErrorStatus_t) handler)

Registers a custom error callback handler.

void I3C1_Controller_EventCallback (I3C_ControllerEvent_t event)

Default event callback handler (weak implementation)

void I3C1_Controller_EventCallbackRegister (void(*)(I3C_ControllerEvent_t) handler)

Registers a custom event callback handler.

I3C_ControllerState_t I3C1_Controller_GetCurrentState (void )

Gets the current state of the controller state machine.

uint8_t I3C1_Controller_GetTargetCount (void )

Gets the total count of attached I3C and I2C target devices.

I3C_ControllerTransferState_t I3C1_Controller_GetTransferState (void )

Gets the current transfer state of the controller.

void I3C1_Controller_HotjoinDisable (void )

Disables Hot-Join acceptance on the I3C bus.

void I3C1_Controller_HotjoinEnable (void )

Enables Hot-Join acceptance on the I3C bus.

I3C_ControllerStatus_t I3C1_Controller_I2CRead (I3C_Controller_I2CDeviceDesc_t * device, uint8_t * data, size_t dataLength, uint8_t speed)

Performs an I2C read transfer from a legacy I2C device.

I3C_ControllerStatus_t I3C1_Controller_I2CWrite (I3C_Controller_I2CDeviceDesc_t * device, uint8_t * data, size_t dataLength, uint8_t speed)

Performs an I2C write transfer to a legacy I2C device.

I3C_ControllerStatus_t I3C1_Controller_I2CWriteRead (I3C_Controller_I2CDeviceDesc_t * device, uint8_t * writeData, size_t writeLength, uint8_t * readData, size_t readLength, uint8_t speed)

Performs a combined I2C write-read transfer to a legacy I2C device.

void I3C1_Controller_IBICallback (uint8_t dynamicAddress, uint8_t ibiLength, uint8_t * payload)

Default IBI callback handler (weak implementation)

void I3C1_Controller_IBICallbackRegister (void(*)(uint8_t dynamicAddress, uint8_t ibiLength, uint8_t *payload) handler)

Registers a custom IBI callback handler.

uint8_t I3C1_Controller_IBIDataRead (uint32_t * ibiData, uint16_t length)

Reads IBI payload data from IBI queue (call only when IBI data length > 0)

I3C_ControllerStatus_t I3C1_Controller_IBIDisable (I3C_Controller_TargetDevicDesc_t * target)

Disables In-Band Interrupt (IBI) for a specific target device.

I3C_ControllerStatus_t I3C1_Controller_IBIEnable (I3C_Controller_TargetDevicDesc_t * target)

Enables In-Band Interrupt (IBI) for a specific target device.

I3C_ControllerStatus_t I3C1_Controller_IBIHotJoinResponse (bool ack)

Configures Hot-Join response behavior for the controller.

uint8_t I3C1_Controller_IBIStatusRead (I3C_IBIData_t * ibiStatus)

Reads IBI status from IBI queue (must be called in callback context)

I3C_ControllerStatus_t I3C1_Controller_Initialize (void )

Initializes the I3C1 Controller module with configured settings.

I3C_ControllerStatus_t I3C1_Controller_Read (I3C_Controller_TargetDevicDesc_t * target, uint8_t * buf, uint32_t num_bytes)

Performs a private I3C read transfer from a target device.

uint8_t I3C1_Controller_ReadResponse (I3C_ResponseData_t * response)

Reads the most recent response from response queue.

I3C_ControllerStatus_t I3C1_Controller_RecoverBus (void )

Attempts bus recovery via abort and resume sequence.

I3C_ControllerStatus_t I3C1_Controller_Reset (void )

Resets all FIFOs and queues of the I3C1 Controller.

void I3C1_Controller_Resume (void )

Resumes I3C operations after abort.

void I3C1_Controller_SECCCallback (void )

Default single-bit ECC error callback handler (weak implementation)

void I3C1_Controller_SECCCallbackRegister (void(*)(void) handler)

Registers a custom single-bit ECC error callback handler.

I3C_ControllerStatus_t I3C1_Controller_Write (I3C_Controller_TargetDevicDesc_t * target, uint8_t * buf, uint32_t num_bytes)

Performs a private I3C write transfer to a target device.

I3C_ControllerStatus_t I3C1_Controller_WriteRead (I3C_Controller_TargetDevicDesc_t * target, const void * write_buf, size_t num_write, void * read_buf, size_t num_read)

Performs a combined I3C write-read transfer to a target device.

I3C_Controller_TargetDevicDesc_t* I3C1_FindTargetByDynamicAddress (uint8_t dynamicAddress)

Finds a target device by its assigned dynamic address.

I3C_ControllerStatus_t I3C_Controller_Transfer (I3C_Controller_TargetDevicDesc_t * target, I3C_Controller_Msg_t * msgs, uint8_t num_msgs)

Performs multiple I3C transfers as a sequence of messages.

enum I3C_Controller_CccCapsFmt_t

GETCAPS CCC response format enumeration.

enum I3C_Controller_CccEnttmDefbyte_t

ENTTM CCC defining byte enumeration.

enum I3C_Controller_CccMxdsDefbyte_t

GETMXDS CCC defining byte enumeration.

enum I3C_Controller_CccMxdsFmt_t

GETMXDS CCC response format enumeration.

enum I3C_Controller_CCCRstactDefiningByte_t

RSTACT CCC defining byte values for target reset actions.

enum I3C_Controller_CccStatusDefbyte_t

GETSTATUS CCC defining byte enumeration.

enum I3C_Controller_CccStatusFmt_t

GETSTATUS CCC response format enumeration.

enum I3C_Controller_IBIType_t

IBI (In-Band Interrupt) type enumeration.

enum I3C_Controller_TranferFlags

Transfer flags for I3C message configuration.

enum I3C_ControllerCcc_t

I3C Common Command Codes (CCC) as per MIPI I3C Specification v1.1.1.

enum I3C_ControllerDeviceType_t

Device type enumeration (I3C vs legacy I2C)

enum I3C_ControllerErrorStatus_t

Controller error status codes for error callback notifications.

enum I3C_ControllerEvent_t

Controller event types for event callback notifications.

enum I3C_ControllerState_t

Controller state machine states.

enum I3C_ControllerStatus_t

Controller API return status codes.

enum I3C_ControllerTransferState_t

Controller transfer state machine states.

const struct I3C_CONTROLLER_INTERFACE I3C1_Controller

Structure object of type I3C_CONTROLLER_INTERFACE with the custom name given by the user in the Melody Driver User interface. The default name e.g. I3C1_Controller can be changed by the user in the I3C user interface. This allows defining a structure with application specific name using the 'Custom Name' field. Application specific name allows the API Portability.

I3C_Controller_I2CDeviceDesc_t initI2CTargets[]

Array of I2C target device descriptors initialized from UI configuration.

I3C_Controller_TargetDevicDesc_t initI3CTargets[]

Array of I3C target device descriptors initialized from UI configuration.

• struct {

  • uint32_t CMD_ATTR:3

  • uint32_t TID:4

  • uint32_t CMD:8

  • uint32_t RESERVED:1

  • uint32_t DEV_INDEX:5

  • uint32_t DEV_COUNT:5

  • uint32_t ROC:1

  • uint32_t __pad0__:3

  • uint32_t TOC:1

  • uint32_t __pad1__:1

• } frame

• uint32_t AddrAssignCommand

uint32_t __pad0__

uint32_t __pad1__

uint32_t AddrAssignCommand

uint32_t CMD

uint32_t CMD_ATTR

uint32_t DEV_COUNT

uint32_t DEV_INDEX

struct { ... } frame

uint32_t RESERVED

uint32_t ROC

uint32_t TID

uint32_t TOC

• uint8_t bcr

uint8_t bcr

Bus Characteristics Register.

• I3C_Controller_CccCapsFmt fmt1

• uint8_t raw [4]

I3C_Controller_CccCapsFmt fmt1

uint8_t raw[4]

• uint8_t caps [4]

• uint8_t len

uint8_t caps[4]

Up to 4 capability bytes.

uint8_t len

Number of valid bytes in caps[].

• uint8_t dcr

uint8_t dcr

Device Characteristics Register.

• uint8_t * payload

• uint16_t length

uint16_t length

Length of payload data in bytes

uint8_t* payload

Pointer to target list payload data. Must be 4-byte aligned if length > 4

• bool ibi

• bool mr

• bool hj

bool hj

Hot-Join event enable/disable

bool ibi

In-Band Interrupt event enable/disable

bool mr

Controller Role Request event enable/disable

• uint16_t len

• uint8_t ibi_len

uint8_t ibi_len

Max IBI payload length (optional).

uint16_t len

Max read length in bytes.

• uint16_t len

uint16_t len

Max write length in bytes.

• I3C_Controller_CccMxdsFmt fmt1

• uint8_t raw [6]

I3C_Controller_CccMxdsFmt fmt1

uint8_t raw[6]

• uint8_t maxwr

• uint8_t maxrd

• uint32_t maxrd_turnaround

uint8_t maxrd

Max read data speed.

uint32_t maxrd_turnaround

Max read turnaround (us).

uint8_t maxwr

Max write data speed.

• struct {

  • uint8_t id

  • uint8_t * data

  • uint16_t data_len

• } ccc

• struct {

  • I3C_Controller_CCCTargetPayload_t * targets

  • uint8_t num_targets

• } targets

struct { ... } ccc

CCC command sub-structure (broadcast data / defining byte)

uint8_t* data

Pointer to broadcast TX data (NULL if no payload). Must be 4-byte aligned if data_len > 4

uint16_t data_len

Length of broadcast TX data in bytes

uint8_t id

CCC command code (one of the I3C_BCCC_* or I3C_DCCC_* defines)

uint8_t num_targets

Number of targets in the targets array (0 = broadcast CCC)

I3C_Controller_CCCTargetPayload_t* targets

Array of per-target payloads (for direct CCCs)

struct { ... } targets

Direct CCC target information sub-structure

• uint64_t pid

uint64_t pid

48-bit PID (upper 16 bits zero).

• I3C_Controller_CccStatusFmt fmt1

• uint8_t raw [2]

I3C_Controller_CccStatusFmt fmt1

uint8_t raw[2]

• uint16_t status

uint16_t status

16-bit device status word.

• uint8_t addr

• uint8_t * data

• uint16_t data_len

uint8_t addr

Dynamic address of the target (7-bit)

uint8_t* data

Pointer to the data buffer (TX for write CCCs, RX for read CCCs). Must be 4-byte aligned if data_len > 4

uint16_t data_len

Length of the data buffer in bytes

• uint8_t node

• uint16_t wlen

• const uint8_t * wbuff

• uint16_t rlen

• uint8_t * rbuff

• uint8_t termination

• uint8_t speed

• uint8_t transID

uint8_t node

Target device node index in device address table

uint8_t* rbuff

Pointer to read data buffer (must be 4-byte aligned if rlen > 4)

uint16_t rlen

Number of bytes to read (0 if write-only transfer)

uint8_t speed

I2C speed mode: I3C_SPEED_I2C_FM or I3C_SPEED_I2C_FM_PLUS

uint8_t termination

Transfer termination: 0 = RESTART, 1 = STOP

uint8_t transID

Transaction ID for tracking (0-15)

const uint8_t* wbuff

Pointer to write data buffer (must be 4-byte aligned if wlen > 4)

uint16_t wlen

Number of bytes to write (0 if read-only transfer)

• I3C_ControllerStatus_t(* Initialize )(void)

  Pointer to I3Cx_Controller_Initialize e.g. I3C1_Controller_Initialize.

• I3C_ControllerStatus_t(* Deinitialize )(void)

  Pointer to I3Cx_Controller_Deinitialize e.g. I3C1_Controller_Deinitialize.

• void(* Enable )(void)

  Pointer to I3Cx_Controller_Enable e.g. I3C1_Controller_Enable.

• void(* Disable )(void)

  Pointer to I3Cx_Controller_Disable e.g. I3C1_Controller_Disable.

• I3C_ControllerStatus_t(* Reset )(void)

  Pointer to I3Cx_Controller_Reset e.g. I3C1_Controller_Reset.

• I3C_ControllerStatus_t(* RecoverBus )(void)

  Pointer to I3Cx_Controller_RecoverBus e.g. I3C1_Controller_RecoverBus.

• uint8_t(* GetTargetCount )(void)

  Pointer to I3Cx_Controller_GetTargetCount e.g. I3C1_Controller_GetTargetCount.

• I3C_Controller_TargetDevicDesc_t *(* FindTargetByDynamicAddress )(uint8_t dynamicAddress)

  Pointer to I3Cx_FindTargetByDynamicAddress e.g. I3C1_FindTargetByDynamicAddress.

• I3C_ControllerStatus_t(* AttachI3CDevice )(I3C_Controller_TargetDevicDesc_t *i3cTarget)

  Pointer to I3Cx_Controller_AttachI3CDevice e.g. I3C1_Controller_AttachI3CDevice.

• I3C_ControllerStatus_t(* AttachI2CDevice )(I3C_Controller_I2CDeviceDesc_t *i2cDevice)

  Pointer to I3Cx_Controller_AttachI2CDevice e.g. I3C1_Controller_AttachI2CDevice.

• I3C_ControllerStatus_t(* DoDaa )(uint8_t startNode, uint8_t targetCount)

  Pointer to I3Cx_Controller_DoDaa e.g. I3C1_Controller_DoDaa.

• I3C_ControllerStatus_t(* Transfer )(I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_Msg_t *msgs, uint8_t num_msgs)

  Pointer to I3C_Controller_Transfer. Note: If message buffer length > 4 bytes, the buffer must be 4-byte aligned.

• I3C_ControllerStatus_t(* I2CWrite )(I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

  Pointer to I3Cx_Controller_I2CWrite e.g. I3C1_Controller_I2CWrite. Note: If dataLength > 4 bytes, data buffer must be 4-byte aligned.

• I3C_ControllerStatus_t(* I2CRead )(I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

  Pointer to I3Cx_Controller_I2CRead e.g. I3C1_Controller_I2CRead. Note: If dataLength > 4 bytes, data buffer must be 4-byte aligned.

• I3C_ControllerStatus_t(* I2CWriteRead )(I3C_Controller_I2CDeviceDesc_t *device, uint8_t *writeData, size_t writeLength, uint8_t *readData, size_t readLength, uint8_t speed)

  Pointer to I3Cx_Controller_I2CWriteRead e.g. I3C1_Controller_I2CWriteRead. Note: If length > 4 bytes, buffers must be 4-byte aligned.

• I3C_ControllerStatus_t(* Write )(I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

  Pointer to I3Cx_Controller_Write e.g. I3C1_Controller_Write. Note: If num_bytes > 4, buf must be 4-byte aligned.

• I3C_ControllerStatus_t(* Read )(I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

  Pointer to I3Cx_Controller_Read e.g. I3C1_Controller_Read. Note: If num_bytes > 4, buf must be 4-byte aligned.

• I3C_ControllerStatus_t(* WriteRead )(I3C_Controller_TargetDevicDesc_t *target, const void *write_buf, size_t num_write, void *read_buf, size_t num_read)

  Pointer to I3Cx_Controller_WriteRead e.g. I3C1_Controller_WriteRead. Note: If length > 4 bytes, buffers must be 4-byte aligned.

• I3C_ControllerStatus_t(* BurstRead )(I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

  Pointer to I3Cx_Controller_BurstRead e.g. I3C1_Controller_BurstRead. Note: If num_bytes > 4, buf must be 4-byte aligned.

• I3C_ControllerStatus_t(* BurstWrite )(I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

  Pointer to I3Cx_Controller_BurstWrite e.g. I3C1_Controller_BurstWrite. Note: If num_bytes > 4, buf must be 4-byte aligned.

• I3C_ControllerStatus_t(* DoCcc )(I3C_Controller_CccPayload_t *payload)

  Pointer to I3Cx_Controller_DoCcc e.g. I3C1_Controller_DoCcc.

• I3C_ControllerStatus_t(* CccDoGetBcr )(I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccBcr_t *bcr)

  Pointer to I3Cx_Controller_CccDoGetBcr e.g. I3C1_Controller_CccDoGetBcr.

• I3C_ControllerStatus_t(* CccDoGetDcr )(I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccDcr_t *dcr)

  Pointer to I3Cx_Controller_CccDoGetDcr e.g. I3C1_Controller_CccDoGetDcr.

• I3C_ControllerStatus_t(* CccDoGetPid )(I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCPid_t *pid)

  Pointer to I3Cx_Controller_CccDoGetPid e.g. I3C1_Controller_CccDoGetPid.

• I3C_ControllerStatus_t(* CccDoRstactAll )(I3C_Controller_CCCRstactDefiningByte_t action)

  Pointer to I3Cx_Controller_CccDoRstactAll e.g. I3C1_Controller_CccDoRstactAll.

• I3C_ControllerStatus_t(* CccDoRstact )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCRstactDefiningByte_t action, bool get, uint8_t *data)

  Pointer to I3Cx_Controller_CccDoRstact e.g. I3C1_Controller_CccDoRstact.

• I3C_ControllerStatus_t(* CccDoRstdaa )(I3C_Controller_TargetDevicDesc_t *target)

  Pointer to I3Cx_Controller_CccDoRstdaa e.g. I3C1_Controller_CccDoRstdaa.

• I3C_ControllerStatus_t(* CccDoRstdaaAll )(void)

  Pointer to I3Cx_Controller_CccDoRstdaaAll e.g. I3C1_Controller_CccDoRstdaaAll.

• I3C_ControllerStatus_t(* CccDoSetDasa )(I3C_Controller_TargetDevicDesc_t *target, uint8_t da)

  Pointer to I3Cx_Controller_CccDoSetDasa e.g. I3C1_Controller_CccDoSetDasa.

• I3C_ControllerStatus_t(* CccDoSetNewda )(I3C_Controller_TargetDevicDesc_t *target, uint8_t new_da)

  Pointer to I3Cx_Controller_CccDoSetNewda e.g. I3C1_Controller_CccDoSetNewda.

• I3C_ControllerStatus_t(* CccDoEventsAllSet )(bool enable, I3C_Controller_CccEvents_t *events)

  Pointer to I3Cx_Controller_CccDoEventsAllSet e.g. I3C1_Controller_CccDoEventsAllSet.

• I3C_ControllerStatus_t(* CccDoEventsSet )(I3C_Controller_TargetDevicDesc_t *target, bool enable, I3C_Controller_CccEvents_t *events)

  Pointer to I3Cx_Controller_CccDoEventsSet e.g. I3C1_Controller_CccDoEventsSet.

• I3C_ControllerStatus_t(* CccDoEntas )(const I3C_Controller_TargetDevicDesc_t *target, uint8_t as)

  Pointer to I3Cx_Controller_CccDoEntas e.g. I3C1_Controller_CccDoEntas.

• I3C_ControllerStatus_t(* CccDoEntasAll )(uint8_t as)

  Pointer to I3Cx_Controller_CccDoEntasAll e.g. I3C1_Controller_CccDoEntasAll.

• I3C_ControllerStatus_t(* CccDoSetMwlAll )(const I3C_Controller_CccMwl_t *mwl)

  Pointer to I3Cx_Controller_CccDoSetMwlAll e.g. I3C1_Controller_CccDoSetMwlAll.

• I3C_ControllerStatus_t(* CccDoSetMwl )(const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMwl_t *mwl)

  Pointer to I3Cx_Controller_CccDoSetMwl e.g. I3C1_Controller_CccDoSetMwl.

• I3C_ControllerStatus_t(* CccDoGetMwl )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMwl_t *mwl)

  Pointer to I3Cx_Controller_CccDoGetMwl e.g. I3C1_Controller_CccDoGetMwl.

• I3C_ControllerStatus_t(* CccDoSetMrlAll )(const I3C_Controller_CccMrl_t *mrl, bool has_ibi_size)

  Pointer to I3Cx_Controller_CccDoSetMrlAll e.g. I3C1_Controller_CccDoSetMrlAll.

• I3C_ControllerStatus_t(* CccDoSetMrl )(const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMrl_t *mrl)

  Pointer to I3Cx_Controller_CccDoSetMrl e.g. I3C1_Controller_CccDoSetMrl.

• I3C_ControllerStatus_t(* CccDoGetMrl )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMrl_t *mrl)

  Pointer to I3Cx_Controller_CccDoGetMrl e.g. I3C1_Controller_CccDoGetMrl.

• I3C_ControllerStatus_t(* CccDoEnttm )(I3C_Controller_CccEnttmDefbyte_t defbyte)

  Pointer to I3Cx_Controller_CccDoEnttm e.g. I3C1_Controller_CccDoEnttm.

• I3C_ControllerStatus_t(* CccDoGetStatus )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccStatus_t *status, I3C_Controller_CccStatusFmt_t fmt, I3C_Controller_CccStatusDefbyte_t defbyte)

  Pointer to I3Cx_Controller_CccDoGetStatus e.g. I3C1_Controller_CccDoGetStatus.

• I3C_ControllerStatus_t(* CccDoGetCaps )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccCaps_t *caps, I3C_Controller_CccCapsFmt_t fmt, uint8_t defbyte)

  Pointer to I3Cx_Controller_CccDoGetCaps e.g. I3C1_Controller_CccDoGetCaps.

• I3C_ControllerStatus_t(* CccDoSetVendor )(const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len)

  Pointer to I3Cx_Controller_CccDoSetVendor e.g. I3C1_Controller_CccDoSetVendor.

• I3C_ControllerStatus_t(* CccDoGetVendor )(const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len, size_t *num_xfer)

  Pointer to I3Cx_Controller_CccDoGetVendor e.g. I3C1_Controller_CccDoGetVendor.

• I3C_ControllerStatus_t(* CccDoGetVendorDefbyte )(const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t defbyte, uint8_t *payload, size_t len, size_t *num_xfer)

  Pointer to I3Cx_Controller_CccDoGetVendorDefbyte e.g. I3C1_Controller_CccDoGetVendorDefbyte.

• I3C_ControllerStatus_t(* CccDoSetVendorAll )(uint8_t id, uint8_t *payload, size_t len)

  Pointer to I3Cx_Controller_CccDoSetVendorAll e.g. I3C1_Controller_CccDoSetVendorAll.

• I3C_ControllerStatus_t(* CccDoSetAasaAll )(void)

  Pointer to I3Cx_Controller_CccDoSetAasaAll e.g. I3C1_Controller_CccDoSetAasaAll.

• I3C_ControllerStatus_t(* CccDoGetmxds )(const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMxds_t *caps, I3C_Controller_CccMxdsFmt_t fmt, I3C_Controller_CccMxdsDefbyte_t defbyte)

  Pointer to I3Cx_Controller_CccDoGetmxds e.g. I3C1_Controller_CccDoGetmxds.

• I3C_ControllerStatus_t(* CccDoDeftgtsAll )(I3C_Controller_CccDeftgts_t *deftgts)

  Pointer to I3Cx_Controller_CccDoDeftgtsAll e.g. I3C1_Controller_CccDoDeftgtsAll.

• I3C_ControllerStatus_t(* CccDoSetBuscon )(uint8_t *context, uint16_t length)

  Pointer to I3Cx_Controller_CccDoSetBuscon e.g. I3C1_Controller_CccDoSetBuscon.

• I3C_ControllerStatus_t(* CccDoGetAcccr )(const I3C_Controller_TargetDevicDesc_t *target, uint8_t *handoff_address)

  Pointer to I3Cx_Controller_CccDoGetAcccr e.g. I3C1_Controller_CccDoGetAcccr.

• uint8_t(* IBIStatusRead )(I3C_IBIData_t *ibiStatus)

  Pointer to I3Cx_Controller_IBIStatusRead e.g. I3C1_Controller_IBIStatusRead.

• uint8_t(* IBIDataRead )(uint32_t *ibiData, uint16_t length)

  Pointer to I3Cx_Controller_IBIDataRead e.g. I3C1_Controller_IBIDataRead.

• void(* HotjoinEnable )(void)

  Pointer to I3Cx_Controller_HotjoinEnable e.g. I3C1_Controller_HotjoinEnable.

• void(* HotjoinDisable )(void)

  Pointer to I3Cx_Controller_HotjoinDisable e.g. I3C1_Controller_HotjoinDisable.

• I3C_ControllerStatus_t(* Abort )(void)

  Pointer to I3Cx_Controller_Abort e.g. I3C1_Controller_Abort.

• void(* Resume )(void)

  Pointer to I3Cx_Controller_Resume e.g. I3C1_Controller_Resume.

• void(* BufferResetAll )(void)

  Pointer to I3Cx_Controller_BufferResetAll e.g. I3C1_Controller_BufferResetAll.

• void(* BusReset )(void)

  Pointer to I3Cx_Controller_BusReset e.g. I3C1_Controller_BusReset.

• I3C_ControllerTransferState_t(* GetTransferState )(void)

  Pointer to I3Cx_Controller_GetTransferState e.g. I3C1_Controller_GetTransferState.

• I3C_ControllerState_t(* GetCurrentState )(void)

  Pointer to I3Cx_Controller_GetCurrentState e.g. I3C1_Controller_GetCurrentState.

• I3C_ControllerStatus_t(* AbortIsDone )(void)

  Pointer to I3Cx_Controller_AbortIsDone e.g. I3C1_Controller_AbortIsDone.

• uint8_t(* ReadResponse )(I3C_ResponseData_t *response)

  Pointer to I3Cx_Controller_ReadResponse e.g. I3C1_Controller_ReadResponse.

• void(* EventCallbackRegister )(void(*handler)(I3C_ControllerEvent_t))

  Pointer to I3Cx_Controller_EventCallbackRegister e.g. I3C1_Controller_EventCallbackRegister.

• void(* IBICallbackRegister )(void(*handler)(uint8_t dynamicAddress, uint8_t ibiLength, uint8_t *payload))

  Pointer to I3Cx_Controller_IBICallbackRegister e.g. I3C1_Controller_IBICallbackRegister.

• void(* ErrorCallbackRegister )(void(*handler)(I3C_ControllerErrorStatus_t))

  Pointer to I3Cx_Controller_ErrorCallbackRegister e.g. I3C1_Controller_ErrorCallbackRegister.

• void(* SECCCallbackRegister )(void(*handler)(void))

  Pointer to I3Cx_Controller_SECCCallbackRegister e.g. I3C1_Controller_SECCCallbackRegister.

• void(* DECCCallbackRegister )(void(*handler)(void))

  Pointer to I3Cx_Controller_DECCCallbackRegister e.g. I3C1_Controller_DECCCallbackRegister.

• I3C_ControllerStatus_t(* IBIEnable )(I3C_Controller_TargetDevicDesc_t *target)

  Pointer to I3Cx_Controller_IBIEnable e.g. I3C1_Controller_IBIEnable.

• I3C_ControllerStatus_t(* IBIDisable )(I3C_Controller_TargetDevicDesc_t *target)

  Pointer to I3Cx_Controller_IBIDisable e.g. I3C1_Controller_IBIDisable.

• I3C_ControllerStatus_t(* IBIHotJoinResponse )(bool ack)

  Pointer to I3Cx_Controller_IBIHotJoinResponse e.g. I3C1_Controller_IBIHotJoinResponse.

I3C_ControllerStatus_t(* Abort) (void)

Pointer to I3Cx_Controller_Abort e.g. I3C1_Controller_Abort.

I3C_ControllerStatus_t(* AbortIsDone) (void)

Pointer to I3Cx_Controller_AbortIsDone e.g. I3C1_Controller_AbortIsDone.

I3C_ControllerStatus_t(* AttachI2CDevice) (I3C_Controller_I2CDeviceDesc_t *i2cDevice)

Pointer to I3Cx_Controller_AttachI2CDevice e.g. I3C1_Controller_AttachI2CDevice.

I3C_ControllerStatus_t(* AttachI3CDevice) (I3C_Controller_TargetDevicDesc_t *i3cTarget)

Pointer to I3Cx_Controller_AttachI3CDevice e.g. I3C1_Controller_AttachI3CDevice.

void(* BufferResetAll) (void)

Pointer to I3Cx_Controller_BufferResetAll e.g. I3C1_Controller_BufferResetAll.

I3C_ControllerStatus_t(* BurstRead) (I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

Pointer to I3Cx_Controller_BurstRead e.g. I3C1_Controller_BurstRead. Note: If num_bytes > 4, buf must be 4-byte aligned.

I3C_ControllerStatus_t(* BurstWrite) (I3C_Controller_TargetDevicDesc_t *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)

Pointer to I3Cx_Controller_BurstWrite e.g. I3C1_Controller_BurstWrite. Note: If num_bytes > 4, buf must be 4-byte aligned.

void(* BusReset) (void)

Pointer to I3Cx_Controller_BusReset e.g. I3C1_Controller_BusReset.

I3C_ControllerStatus_t(* CccDoDeftgtsAll) (I3C_Controller_CccDeftgts_t *deftgts)

Pointer to I3Cx_Controller_CccDoDeftgtsAll e.g. I3C1_Controller_CccDoDeftgtsAll.

I3C_ControllerStatus_t(* CccDoEntas) (const I3C_Controller_TargetDevicDesc_t *target, uint8_t as)

Pointer to I3Cx_Controller_CccDoEntas e.g. I3C1_Controller_CccDoEntas.

I3C_ControllerStatus_t(* CccDoEntasAll) (uint8_t as)

Pointer to I3Cx_Controller_CccDoEntasAll e.g. I3C1_Controller_CccDoEntasAll.

I3C_ControllerStatus_t(* CccDoEnttm) (I3C_Controller_CccEnttmDefbyte_t defbyte)

Pointer to I3Cx_Controller_CccDoEnttm e.g. I3C1_Controller_CccDoEnttm.

I3C_ControllerStatus_t(* CccDoEventsAllSet) (bool enable, I3C_Controller_CccEvents_t *events)

Pointer to I3Cx_Controller_CccDoEventsAllSet e.g. I3C1_Controller_CccDoEventsAllSet.

I3C_ControllerStatus_t(* CccDoEventsSet) (I3C_Controller_TargetDevicDesc_t *target, bool enable, I3C_Controller_CccEvents_t *events)

Pointer to I3Cx_Controller_CccDoEventsSet e.g. I3C1_Controller_CccDoEventsSet.

I3C_ControllerStatus_t(* CccDoGetAcccr) (const I3C_Controller_TargetDevicDesc_t *target, uint8_t *handoff_address)

Pointer to I3Cx_Controller_CccDoGetAcccr e.g. I3C1_Controller_CccDoGetAcccr.

I3C_ControllerStatus_t(* CccDoGetBcr) (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccBcr_t *bcr)

Pointer to I3Cx_Controller_CccDoGetBcr e.g. I3C1_Controller_CccDoGetBcr.

I3C_ControllerStatus_t(* CccDoGetCaps) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccCaps_t *caps, I3C_Controller_CccCapsFmt_t fmt, uint8_t defbyte)

Pointer to I3Cx_Controller_CccDoGetCaps e.g. I3C1_Controller_CccDoGetCaps.

I3C_ControllerStatus_t(* CccDoGetDcr) (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccDcr_t *dcr)

Pointer to I3Cx_Controller_CccDoGetDcr e.g. I3C1_Controller_CccDoGetDcr.

I3C_ControllerStatus_t(* CccDoGetMrl) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMrl_t *mrl)

Pointer to I3Cx_Controller_CccDoGetMrl e.g. I3C1_Controller_CccDoGetMrl.

I3C_ControllerStatus_t(* CccDoGetMwl) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMwl_t *mwl)

Pointer to I3Cx_Controller_CccDoGetMwl e.g. I3C1_Controller_CccDoGetMwl.

I3C_ControllerStatus_t(* CccDoGetmxds) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccMxds_t *caps, I3C_Controller_CccMxdsFmt_t fmt, I3C_Controller_CccMxdsDefbyte_t defbyte)

Pointer to I3Cx_Controller_CccDoGetmxds e.g. I3C1_Controller_CccDoGetmxds.

I3C_ControllerStatus_t(* CccDoGetPid) (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCPid_t *pid)

Pointer to I3Cx_Controller_CccDoGetPid e.g. I3C1_Controller_CccDoGetPid.

I3C_ControllerStatus_t(* CccDoGetStatus) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CccStatus_t *status, I3C_Controller_CccStatusFmt_t fmt, I3C_Controller_CccStatusDefbyte_t defbyte)

Pointer to I3Cx_Controller_CccDoGetStatus e.g. I3C1_Controller_CccDoGetStatus.

I3C_ControllerStatus_t(* CccDoGetVendor) (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len, size_t *num_xfer)

Pointer to I3Cx_Controller_CccDoGetVendor e.g. I3C1_Controller_CccDoGetVendor.

I3C_ControllerStatus_t(* CccDoGetVendorDefbyte) (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t defbyte, uint8_t *payload, size_t len, size_t *num_xfer)

Pointer to I3Cx_Controller_CccDoGetVendorDefbyte e.g. I3C1_Controller_CccDoGetVendorDefbyte.

I3C_ControllerStatus_t(* CccDoRstact) (const I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_CCCRstactDefiningByte_t action, bool get, uint8_t *data)

Pointer to I3Cx_Controller_CccDoRstact e.g. I3C1_Controller_CccDoRstact.

I3C_ControllerStatus_t(* CccDoRstactAll) (I3C_Controller_CCCRstactDefiningByte_t action)

Pointer to I3Cx_Controller_CccDoRstactAll e.g. I3C1_Controller_CccDoRstactAll.

I3C_ControllerStatus_t(* CccDoRstdaa) (I3C_Controller_TargetDevicDesc_t *target)

Pointer to I3Cx_Controller_CccDoRstdaa e.g. I3C1_Controller_CccDoRstdaa.

I3C_ControllerStatus_t(* CccDoRstdaaAll) (void)

Pointer to I3Cx_Controller_CccDoRstdaaAll e.g. I3C1_Controller_CccDoRstdaaAll.

I3C_ControllerStatus_t(* CccDoSetAasaAll) (void)

Pointer to I3Cx_Controller_CccDoSetAasaAll e.g. I3C1_Controller_CccDoSetAasaAll.

I3C_ControllerStatus_t(* CccDoSetBuscon) (uint8_t *context, uint16_t length)

Pointer to I3Cx_Controller_CccDoSetBuscon e.g. I3C1_Controller_CccDoSetBuscon.

I3C_ControllerStatus_t(* CccDoSetDasa) (I3C_Controller_TargetDevicDesc_t *target, uint8_t da)

Pointer to I3Cx_Controller_CccDoSetDasa e.g. I3C1_Controller_CccDoSetDasa.

I3C_ControllerStatus_t(* CccDoSetMrl) (const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMrl_t *mrl)

Pointer to I3Cx_Controller_CccDoSetMrl e.g. I3C1_Controller_CccDoSetMrl.

I3C_ControllerStatus_t(* CccDoSetMrlAll) (const I3C_Controller_CccMrl_t *mrl, bool has_ibi_size)

Pointer to I3Cx_Controller_CccDoSetMrlAll e.g. I3C1_Controller_CccDoSetMrlAll.

I3C_ControllerStatus_t(* CccDoSetMwl) (const I3C_Controller_TargetDevicDesc_t *target, const I3C_Controller_CccMwl_t *mwl)

Pointer to I3Cx_Controller_CccDoSetMwl e.g. I3C1_Controller_CccDoSetMwl.

I3C_ControllerStatus_t(* CccDoSetMwlAll) (const I3C_Controller_CccMwl_t *mwl)

Pointer to I3Cx_Controller_CccDoSetMwlAll e.g. I3C1_Controller_CccDoSetMwlAll.

I3C_ControllerStatus_t(* CccDoSetNewda) (I3C_Controller_TargetDevicDesc_t *target, uint8_t new_da)

Pointer to I3Cx_Controller_CccDoSetNewda e.g. I3C1_Controller_CccDoSetNewda.

I3C_ControllerStatus_t(* CccDoSetVendor) (const I3C_Controller_TargetDevicDesc_t *target, uint8_t id, uint8_t *payload, size_t len)

Pointer to I3Cx_Controller_CccDoSetVendor e.g. I3C1_Controller_CccDoSetVendor.

I3C_ControllerStatus_t(* CccDoSetVendorAll) (uint8_t id, uint8_t *payload, size_t len)

Pointer to I3Cx_Controller_CccDoSetVendorAll e.g. I3C1_Controller_CccDoSetVendorAll.

void(* DECCCallbackRegister) (void(*handler)(void))

Pointer to I3Cx_Controller_DECCCallbackRegister e.g. I3C1_Controller_DECCCallbackRegister.

I3C_ControllerStatus_t(* Deinitialize) (void)

Pointer to I3Cx_Controller_Deinitialize e.g. I3C1_Controller_Deinitialize.

void(* Disable) (void)

Pointer to I3Cx_Controller_Disable e.g. I3C1_Controller_Disable.

I3C_ControllerStatus_t(* DoCcc) (I3C_Controller_CccPayload_t *payload)

Pointer to I3Cx_Controller_DoCcc e.g. I3C1_Controller_DoCcc.

I3C_ControllerStatus_t(* DoDaa) (uint8_t startNode, uint8_t targetCount)

Pointer to I3Cx_Controller_DoDaa e.g. I3C1_Controller_DoDaa.

void(* Enable) (void)

Pointer to I3Cx_Controller_Enable e.g. I3C1_Controller_Enable.

void(* ErrorCallbackRegister) (void(*handler)(I3C_ControllerErrorStatus_t))

Pointer to I3Cx_Controller_ErrorCallbackRegister e.g. I3C1_Controller_ErrorCallbackRegister.

void(* EventCallbackRegister) (void(*handler)(I3C_ControllerEvent_t))

Pointer to I3Cx_Controller_EventCallbackRegister e.g. I3C1_Controller_EventCallbackRegister.

I3C_Controller_TargetDevicDesc_t*(* FindTargetByDynamicAddress) (uint8_t dynamicAddress)

Pointer to I3Cx_FindTargetByDynamicAddress e.g. I3C1_FindTargetByDynamicAddress.

I3C_ControllerState_t(* GetCurrentState) (void)

Pointer to I3Cx_Controller_GetCurrentState e.g. I3C1_Controller_GetCurrentState.

uint8_t(* GetTargetCount) (void)

Pointer to I3Cx_Controller_GetTargetCount e.g. I3C1_Controller_GetTargetCount.

I3C_ControllerTransferState_t(* GetTransferState) (void)

Pointer to I3Cx_Controller_GetTransferState e.g. I3C1_Controller_GetTransferState.

void(* HotjoinDisable) (void)

Pointer to I3Cx_Controller_HotjoinDisable e.g. I3C1_Controller_HotjoinDisable.

void(* HotjoinEnable) (void)

Pointer to I3Cx_Controller_HotjoinEnable e.g. I3C1_Controller_HotjoinEnable.

I3C_ControllerStatus_t(* I2CRead) (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

Pointer to I3Cx_Controller_I2CRead e.g. I3C1_Controller_I2CRead. Note: If dataLength > 4 bytes, data buffer must be 4-byte aligned.

I3C_ControllerStatus_t(* I2CWrite) (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *data, size_t dataLength, uint8_t speed)

Pointer to I3Cx_Controller_I2CWrite e.g. I3C1_Controller_I2CWrite. Note: If dataLength > 4 bytes, data buffer must be 4-byte aligned.

I3C_ControllerStatus_t(* I2CWriteRead) (I3C_Controller_I2CDeviceDesc_t *device, uint8_t *writeData, size_t writeLength, uint8_t *readData, size_t readLength, uint8_t speed)

Pointer to I3Cx_Controller_I2CWriteRead e.g. I3C1_Controller_I2CWriteRead. Note: If length > 4 bytes, buffers must be 4-byte aligned.

void(* IBICallbackRegister) (void(*handler)(uint8_t dynamicAddress, uint8_t ibiLength, uint8_t *payload))

Pointer to I3Cx_Controller_IBICallbackRegister e.g. I3C1_Controller_IBICallbackRegister.

uint8_t(* IBIDataRead) (uint32_t *ibiData, uint16_t length)

Pointer to I3Cx_Controller_IBIDataRead e.g. I3C1_Controller_IBIDataRead.

I3C_ControllerStatus_t(* IBIDisable) (I3C_Controller_TargetDevicDesc_t *target)

Pointer to I3Cx_Controller_IBIDisable e.g. I3C1_Controller_IBIDisable.

I3C_ControllerStatus_t(* IBIEnable) (I3C_Controller_TargetDevicDesc_t *target)

Pointer to I3Cx_Controller_IBIEnable e.g. I3C1_Controller_IBIEnable.

I3C_ControllerStatus_t(* IBIHotJoinResponse) (bool ack)

Pointer to I3Cx_Controller_IBIHotJoinResponse e.g. I3C1_Controller_IBIHotJoinResponse.

uint8_t(* IBIStatusRead) (I3C_IBIData_t *ibiStatus)

Pointer to I3Cx_Controller_IBIStatusRead e.g. I3C1_Controller_IBIStatusRead.

I3C_ControllerStatus_t(* Initialize) (void)

Pointer to I3Cx_Controller_Initialize e.g. I3C1_Controller_Initialize.

I3C_ControllerStatus_t(* Read) (I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

Pointer to I3Cx_Controller_Read e.g. I3C1_Controller_Read. Note: If num_bytes > 4, buf must be 4-byte aligned.

uint8_t(* ReadResponse) (I3C_ResponseData_t *response)

Pointer to I3Cx_Controller_ReadResponse e.g. I3C1_Controller_ReadResponse.

I3C_ControllerStatus_t(* RecoverBus) (void)

Pointer to I3Cx_Controller_RecoverBus e.g. I3C1_Controller_RecoverBus.

I3C_ControllerStatus_t(* Reset) (void)

Pointer to I3Cx_Controller_Reset e.g. I3C1_Controller_Reset.

void(* Resume) (void)

Pointer to I3Cx_Controller_Resume e.g. I3C1_Controller_Resume.

void(* SECCCallbackRegister) (void(*handler)(void))

Pointer to I3Cx_Controller_SECCCallbackRegister e.g. I3C1_Controller_SECCCallbackRegister.

I3C_ControllerStatus_t(* Transfer) (I3C_Controller_TargetDevicDesc_t *target, I3C_Controller_Msg_t *msgs, uint8_t num_msgs)

Pointer to I3C_Controller_Transfer. Note: If message buffer length > 4 bytes, the buffer must be 4-byte aligned.

I3C_ControllerStatus_t(* Write) (I3C_Controller_TargetDevicDesc_t *target, uint8_t *buf, uint32_t num_bytes)

Pointer to I3Cx_Controller_Write e.g. I3C1_Controller_Write. Note: If num_bytes > 4, buf must be 4-byte aligned.

I3C_ControllerStatus_t(* WriteRead) (I3C_Controller_TargetDevicDesc_t *target, const void *write_buf, size_t num_write, void *read_buf, size_t num_read)

Pointer to I3Cx_Controller_WriteRead e.g. I3C1_Controller_WriteRead. Note: If length > 4 bytes, buffers must be 4-byte aligned.

• uint8_t * buf

• uint8_t msg_id

• uint32_t len

• uint32_t flags

• uint8_t hdr_cmd_code

uint8_t* buf

Pointer to the data buffer (TX or RX depending on flags). Must be 4-byte aligned if len > 4

uint32_t flags

Combination of I3C_MSG_* flags controlling this segment

uint8_t hdr_cmd_code

HDR-DDR command code (7-bit, used only in HDR-DDR mode)

uint32_t len

Number of bytes to transfer

uint8_t msg_id

Transfer message ID

• uint8_t node

• uint16_t command

• uint16_t wlen

• const uint8_t * wbuff

• uint16_t rlen

• uint8_t * rbuff

• uint8_t transID

• uint8_t packetErrorCheck

• uint8_t definingByteData

• bool termination

• bool definingBytePresent

uint16_t command

CCC command code (one of I3C_BCCC_* or I3C_DCCC_* values)

uint8_t definingByteData

Defining byte value (used when definingBytePresent is true)

bool definingBytePresent

True if defining byte should be included in CCC frame

uint8_t node

Target device node index (0 for broadcast CCCs)

uint8_t packetErrorCheck

Packet Error Check: 0 = disabled, 1 = enabled

uint8_t* rbuff

Pointer to read data buffer (must be 4-byte aligned if rlen > 4)

uint16_t rlen

Number of bytes to read (0 if write CCC)

bool termination

Transfer termination: false = RESTART, true = STOP

uint8_t transID

Transaction ID for tracking (0-15)

const uint8_t* wbuff

Pointer to write data buffer (must be 4-byte aligned if wlen > 4)

uint16_t wlen

Number of bytes to write (0 if read CCC)

• uint8_t node

• uint16_t wlen

• const uint8_t * wbuff

• uint16_t rlen

• uint8_t * rbuff

• uint8_t transID

• uint8_t termination

• uint8_t packetErrorCheck

• uint8_t hdrCommand

uint8_t hdrCommand

HDR command code for HDR-DDR mode (7-bit)

uint8_t node

Target device node index in device address table

uint8_t packetErrorCheck

Packet Error Check: 0 = disabled, 1 = enabled

uint8_t* rbuff

Pointer to read data buffer (must be 4-byte aligned if rlen > 4)

uint16_t rlen

Number of bytes to read (0 if write-only transfer)

uint8_t termination

Transfer termination: 0 = RESTART, 1 = STOP

uint8_t transID

Transaction ID for tracking (0-15)

const uint8_t* wbuff

Pointer to write data buffer (must be 4-byte aligned if wlen > 4)

uint16_t wlen

Number of bytes to write (0 if read-only transfer)

• uint32_t DCT_LOC1

• uint32_t DCT_LOC2

• uint32_t DCT_LOC3

• uint32_t DCT_LOC4

uint32_t DCT_LOC1

uint32_t DCT_LOC2

uint32_t DCT_LOC3

uint32_t DCT_LOC4

• uint8_t node

• uint64_t pid

• uint8_t bcr

• uint8_t dcr

• uint8_t dynamic_addr

• uint8_t static_addr

• uint8_t dev_nack_retry_count

• bool ibi_pec_enabled

• bool ibi_mandatory_bytes

• void(* ibi_cb )(struct i3c_device_desc *target, const uint8_t *payload, uint8_t len)

• bool con_req_rej

• bool tar_int_req_rej

uint8_t bcr

Bus Characteristics Register.

bool con_req_rej

controller request reject

uint8_t dcr

Device Characteristics Register.

uint8_t dev_nack_retry_count

device NACK retry count

uint8_t dynamic_addr

Assigned dynamic address (7-bit, 0 = unassigned).

void(* ibi_cb) (struct i3c_device_desc *target, const uint8_t *payload, uint8_t len)

bool ibi_mandatory_bytes

true if IBI has at least one mandatory byte

bool ibi_pec_enabled

true if IBI is packet error check enabled for this target.

uint8_t node

Node index value

uint64_t pid

48-bit Provisional ID stored as a uint64_t (upper 16 bits zero).

uint8_t static_addr

Static / I2C address (7-bit, 0 = none).

bool tar_int_req_rej

target interrupt request reject

• uint64_t PID

• uint8_t BCR

• uint8_t DCR

• uint8_t dynamicAdd

• uint8_t staticAdd

uint8_t BCR

uint8_t DCR

uint8_t dynamicAdd

uint64_t PID

uint8_t staticAdd

• uint8_t node

• uint8_t addr

uint8_t addr

Static I2C address (7-bit).

uint8_t node

Node index value

• struct {

  • uint32_t DATA_LENGTH:8

  • uint32_t IBI_RnW:1

  • uint32_t IBI_ID:7

  • uint32_t __pad0__:8

  • uint32_t LAST_STATUS:1

  • uint32_t TS:1

  • uint32_t __pad1__:4

  • uint32_t IBI_ERROR_STAT:1

  • uint32_t IBI_NACK_STAT:1

• } frame

• uint32_t IBIData

uint32_t __pad0__

uint32_t __pad1__

uint32_t DATA_LENGTH

struct { ... } frame

uint32_t IBI_ERROR_STAT

uint32_t IBI_ID

uint32_t IBI_NACK_STAT

uint32_t IBI_RnW

uint32_t IBIData

uint32_t LAST_STATUS

uint32_t TS

• struct {

  • uint32_t DL:16

  • uint32_t CCCT:8

  • uint32_t TID:4

  • uint32_t ERR_STS:4

• } frame

• uint32_t RespondData

uint32_t CCCT

uint32_t DL

uint32_t ERR_STS

struct { ... } frame

uint32_t RespondData

uint32_t TID

• struct {

  • uint32_t CMD_ATTR:3

  • uint32_t BYTE_STRB0:1

  • uint32_t BYTE_STRB1:1

  • uint32_t BYTE_STRB2:1

  • uint32_t __pad0__:2

  • uint32_t DATA_BYTE_0:8

  • uint32_t DATA_BYTE_1:8

  • uint32_t DATA_BYTE_2:8

• } frame

• uint32_t ShortDataArgument

uint32_t __pad0__

uint32_t BYTE_STRB0

uint32_t BYTE_STRB1

uint32_t BYTE_STRB2

uint32_t CMD_ATTR

uint32_t DATA_BYTE_0

uint32_t DATA_BYTE_1

uint32_t DATA_BYTE_2

struct { ... } frame

uint32_t ShortDataArgument

• struct {

  • uint32_t CMD_ATTR:3

  • uint32_t RESERVED:5

  • uint32_t DB:8

  • uint32_t DL:16

• } frame

• uint32_t TransferArgument

uint32_t CMD_ATTR

uint32_t DB

uint32_t DL

struct { ... } frame

uint32_t RESERVED

uint32_t TransferArgument

• struct {

  • uint32_t CMD_ATTR:3

  • uint32_t TID:4

  • uint32_t CMD:8

  • uint32_t CP:1

  • uint32_t DEV_INDEX:5

  • uint32_t SPEED:3

  • uint32_t RESERVED:1

  • uint32_t DBP:1

  • uint32_t ROC:1

  • uint32_t SDAP:1

  • uint32_t RnW:1

  • uint32_t TGT_RST:1

  • uint32_t TOC:1

  • uint32_t PEC:1

• } frame

• uint32_t TransferCommand

uint32_t CMD

uint32_t CMD_ATTR

uint32_t CP

uint32_t DBP

uint32_t DEV_INDEX

struct { ... } frame

uint32_t PEC

uint32_t RESERVED

uint32_t RnW

uint32_t ROC

uint32_t SDAP

uint32_t SPEED

uint32_t TGT_RST

uint32_t TID

uint32_t TOC

uint32_t TransferCommand