3.14 I3C Target Driver

• struct I3C_TARGET_TRANSMIT_COMMAND

  Transfer command register layout as a 64-bit (two-word) structure.

• union I3C_TARGET_RESPONSE_DATA

  Extended Response Data Structure Format 2 (Table 24-31).

• struct I3C_TARGET_INTERFACE

  Structure containing the function pointers of the I3C Target driver.

• struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS

  Contains the status of the transaction complete operation.

• struct I3C_TARGET_CCC_UPDATE_STATUS

  Contains the status of which CCC fields were updated by the Active Controller. Read via CCCUpdateStatusGet() inside the CCCTableUpdatedCallback.

• enum I3C_TARGET_HJ_STATUS { I3C_TARGET_HJ_COMPLETED_OR_NOT_STARTED = 0, I3C_TARGET_HJ_COMPLETED, I3C_TARGET_HJ_FAILED, I3C_TARGET_HJ_PENDING }

  Defines the status of the Hot-Join operation.

• enum I3C_TARGET_IBI_STATUS { I3C_TARGET_IBI_STATUS_NONE = 0, I3C_TARGET_IBI_STATUS_ACCEPTED = 1, I3C_TARGET_IBI_STATUS_EARLY_TERMINATE = 2, I3C_TARGET_IBI_STATUS_NOT_ATTEMPTED = 3 }

  Defines the status codes for In-Band Interrupt operations.

• enum I3C_TARGET_IBI_REQUEST_ERROR { I3C_TARGET_IBI_REQUEST_NO_ERROR, I3C_TARGET_IBI_REQUEST_SEND_BUFFER_SIZE_EXCEEDED, I3C_TARGET_IBI_REQUEST_NOT_IN_I3C_MODE, I3C_TARGET_IBI_REQUEST_IBI_DISABLED_ON_BUS }

  Defines the error states of the In-Band Interrupt request operation.

• enum I3C_TARGET_TRANSACTION_ERROR_STATUS { I3C_TARGET_TRANSACTION_NO_ERR = 0x0, I3C_TARGET_TRANSACTION_ERR_CRC = 0x1, I3C_TARGET_TRANSACTION_ERR_PARITY = 0x2, I3C_TARGET_TRANSACTION_ERR_FRAME = 0x3, I3C_TARGET_TRANSACTION_ERR_OVERFLOW = 0x6, I3C_TARGET_TRANSACTION_ERR_SDA_STUCK_RELEASE = 0x8, I3C_TARGET_TRANSACTION_ERR_CONTROLLER_EARLY_TERM = 0xA, I3C_TARGET_TRANSACTION_ERR_PEC = 0xC }

  Defines the transaction error status codes.

• enum I3C_TARGET_RX_CMD_SIZE { I3C_TARGET_RX_NO_COMMAND_WORD = 0x0, I3C_TARGET_RX_HDR_COMMAND_CODE_OR_CCC_CODE = 0x1, I3C_TARGET_RX_HDR_COMMAND_CODE_WITH_DEFINING_BYTE = 0x2, I3C_TARGET_RX_HDR_BULK_TRANSFER_COMMAND = 0x4 }

  Defines the command word size in the RX FIFO prefix for received transfers. Indicates whether the first word in the RX buffer is data or an encoded command.

• enum I3C_TARGET_BUFFER_RECEIVE_ERROR { I3C_TARGET_BUFFER_RECEIVE_NO_ERROR, I3C_TARGET_BUFFER_RECEIVE_BUFFER_SIZE_EXCEEDED, I3C_TARGET_BUFFER_RECEIVE_NULL_BUFFER, I3C_TARGET_BUFFER_RECEIVE_TRANSFER_IN_PROGRESS }

  Defines the error status of the buffer receive operation.

• enum I3C_TARGET_BUFFER_TRANSMIT_ERROR { I3C_TARGET_BUFFER_TRANSMIT_NO_ERROR, I3C_TARGET_BUFFER_TRANSMIT_BUFFER_SIZE_EXCEEDED, I3C_TARGET_BUFFER_TRANSMIT_NULL_BUFFER, I3C_TARGET_BUFFER_TRANSMIT_COMMAND_QUEUE_FULL }

  Defines the error status of the buffer transmit operation.

• enum I3C_TARGET_DATA_FLOW_DIRECTION { I3C_TARGET_DATA_TRANSMITTED, I3C_TARGET_DATA_RECEIVED }

  Defines the data flow direction of an I3C transaction.

• enum I3C_TARGET_ACTIVITY_STATE { I3C_TARGET_ACTIVITY_STATE_0 = 0, I3C_TARGET_ACTIVITY_STATE_1 = 1, I3C_TARGET_ACTIVITY_STATE_2 = 2, I3C_TARGET_ACTIVITY_STATE_3 = 3 }

  Defines the activity state of the Target as set by the Controller via ENTAS0/ENTAS1/ENTAS2/ENTAS3 CCC commands.

• void I3C1_Target_Initialize (void)

  Initializes the I3C1 Target peripheral with default configuration.

• void I3C1_Target_Deinitialize (void)

  De-initializes the I3C1 Target peripheral. Disables DMA channels, interrupts, resets all queues/buffers/state machine, and powers off the module.

• void I3C1_Target_Enable (void)

  Enables the I3C1 Target peripheral.

• uint8_t I3C1_Target_IsEnabled (void)

  Checks whether the I3C1 Target peripheral is enabled.

• bool I3C1_Target_IsDynamicAddressValid (void)

  Checks whether the Dynamic Address has been assigned by the Controller.

• void I3C1_Target_Disable (void)

  Disables the I3C1 Target peripheral.

• uint16_t I3C1_Target_MaxWriteLengthGet (void)

  Returns the configured maximum write length.

• void I3C1_Target_MaxWriteLengthSet (uint16_t maxWriteLen)

  Sets the maximum write length.

• uint16_t I3C1_Target_MaxReadLengthGet (void)

  Returns the configured maximum read length.

• void I3C1_Target_MaxReadLengthSet (uint16_t maxReadLen)

  Sets the maximum read length.

• void I3C1_Target_TxBufferFIFOClear (void)

  Clears the I3C1 Target TX buffer FIFO.

• void I3C1_Target_RxBufferFIFOClear (void)

  Clears the I3C1 Target RX buffer FIFO.

• void I3C1_Target_ResponseQueueClear (void)

  Clears the I3C1 Target response queue.

• void I3C1_Target_CommandQueueClear (void)

  Clears the I3C1 Target command queue.

• void I3C1_Target_PeripheralReset (void)

  Resets the I3C1 Target peripheral using the SOFTRST core software reset bit.

• void I3C1_Target_Resume (void)

  Resumes the I3C1 Target peripheral after a halt condition.

• void I3C1_Target_PECEnable (void)

  Enables Packet Error Check (PEC) for SDR transfers. When enabled, the Target appends a CRC-8 byte to read/IBI transfers and validates the CRC-8 byte on write transfers.

• void I3C1_Target_PECDisable (void)

  Disables Packet Error Check (PEC) for SDR transfers. After calling this function, the Target will no longer append or validate CRC-8 bytes on SDR transfers.

• enum I3C_TARGET_BUFFER_RECEIVE_ERROR I3C1_Target_BufferReceive (uint8_t *rxBuf, uint16_t len)

  Configures the buffer for the next Private Write transaction to receive data. The status of the transaction can be checked using the transaction complete callback.

• enum I3C_TARGET_BUFFER_TRANSMIT_ERROR I3C1_Target_BufferTransmit (uint8_t *txBuf, uint16_t len)

  Configures the buffer for the next Private Read transaction to transmit data. The status of the transaction can be checked using the transaction complete callback.

• void I3C1_Target_HDRCommandCodeSet (uint8_t hdrCmdCode)

  Sets the HDR-DDR command code for the next BufferTransmit call. Default is 0x00 (SDR Private Read). For HDR-DDR transfers, set the appropriate HDR command code before calling BufferTransmit.

• enum I3C_TARGET_HJ_STATUS I3C1_Target_HotJoinStatusGet (void)

  Returns the current status of the Hot-Join operation.

• void I3C1_Target_IBIMandatoryDataByteSet (uint8_t mdb)

  Sets the Mandatory Data Byte (MDB) for IBI requests.

• void I3C1_Target_IBIPayloadSizeSet (uint8_t size)

  Sets the IBI payload size.

• uint8_t I3C1_Target_IBIPayloadSizeGet (void)

  Gets the current IBI payload size.

• enum I3C_TARGET_IBI_REQUEST_ERROR I3C1_Target_IBIRequest (uint8_t *payloadBuf, uint16_t payloadLen)

  Initiates an In-Band Interrupt (IBI/SIR) request on the I3C bus.

• bool I3C1_Target_IsIBIEnabledOnBus (void)

  Checks if the IBI capability is enabled on the bus.

• void I3C1_Target_TransactionCompleteCallbackRegister (void(*callback)(struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS *transactionCompleteStatus))

  Registers a callback for the Transaction Complete event. The callback provides the data flow direction and total number of bytes transferred.

• void I3C1_Target_TransactionErrorCallbackRegister (void(*handler)(enum I3C_TARGET_TRANSACTION_ERROR_STATUS transactionError))

  Registers a callback for the Transaction Error event.

• void I3C1_Target_IBIDoneCallbackRegister (void(*handler)(enum I3C_TARGET_IBI_STATUS ibiStatus))

  Registers a callback for the IBI Done event.

• void I3C1_Target_StartConditionDetectedCallbackRegister (void(*callback)(void))

  Registers a callback for the Start Condition detection event.

• void I3C1_Target_DynamicAddressAssignedCallbackRegister (void(*callback)(void))

  Registers a callback for the Dynamic Address Assigned event.

• void I3C1_Target_SingleBitECCErrorCallbackRegister (void(*callback)(void))

  Registers a callback for the Single-Bit ECC Error (SERR) interrupt event.

• void I3C1_Target_DoubleBitECCErrorCallbackRegister (void(*callback)(void))

  Registers a callback for the Double-Bit ECC Error (DERR) interrupt event.

• void I3C1_Target_CCCTableUpdatedCallbackRegister (void(*callback)(void))

  Registers a callback for the CCC Table Updated event. Triggered when the Active Controller updates CCC-mapped registers (e.g. MWL, MRL) via a supported CCC command.

• void I3C1_Target_CCCUpdateStatusGet (struct I3C_TARGET_CCC_UPDATE_STATUS *status)

  Reads the current CCC update status from the I3CxTGTESTA register. Clears the sticky status bits (MWLSTA, MRLSTA) after reading. Call this inside the CCCTableUpdatedCallback to determine which CCC was received from the Active Controller.

• void I3C1_Target_TransmitUnderrunCallbackRegister (void(*callback)(void))

  Registers a callback for the Transmit Underrun event. Triggered when the Extended TX FIFO underflows during a Controller Read transfer.

• void I3C1_Target_ReceiveOverrunCallbackRegister (void(*callback)(void))

  Registers a callback for the Receive Overrun event. Triggered when the RX FIFO overflows during a Controller Write transfer.

• void I3C1_Target_ReadRequestReceivedCallbackRegister (void(*callback)(void))

  Registers a callback for the Read Request Received event. Triggered when the Controller issues a read request and the command queue is empty.

• void I3C1_Target_TransactionCompleteCallback (struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS *status)

  Default weak callback for the Transaction Complete event. Override this function or register a custom callback using I3C1_Target_TransactionCompleteCallbackRegister.

• void I3C1_Target_TransactionErrorCallback (enum I3C_TARGET_TRANSACTION_ERROR_STATUS error)

  Default weak callback for the Transaction Error event. Override this function or register a custom callback using I3C1_Target_TransactionErrorCallbackRegister.

• void I3C1_Target_IBIDoneCallback (enum I3C_TARGET_IBI_STATUS ibiStatus)

  Default weak callback for the IBI Done event. Override this function or register a custom callback using I3C1_Target_IBIDoneCallbackRegister.

• void I3C1_Target_StartConditionDetectedCallback (void)

  Default weak callback for the Start Condition Detected event. Override this function or register a custom callback using I3C1_Target_StartConditionDetectedCallbackRegister.

• void I3C1_Target_DynamicAddressAssignedCallback (void)

  Default weak callback for the Dynamic Address Assigned event. Override this function or register a custom callback using I3C1_Target_DynamicAddressAssignedCallbackRegister.

• void I3C1_Target_SingleBitECCErrorCallback (void)

  Default weak callback for the Single-Bit ECC Error event. Override this function or register a custom callback using I3C1_Target_SingleBitECCErrorCallbackRegister.

• void I3C1_Target_DoubleBitECCErrorCallback (void)

  Default weak callback for the Double-Bit ECC Error event. Override this function or register a custom callback using I3C1_Target_DoubleBitECCErrorCallbackRegister.

• void I3C1_Target_CCCTableUpdatedCallback (void)

  Default weak callback for the CCC Table Updated event. Override this function or register a custom callback using I3C1_Target_CCCTableUpdatedCallbackRegister.

• void I3C1_Target_TransmitUnderrunCallback (void)

  Default weak callback for the Transmit Underrun event. Override this function or register a custom callback using I3C1_Target_TransmitUnderrunCallbackRegister.

• void I3C1_Target_ReceiveOverrunCallback (void)

  Default weak callback for the Receive Overrun event. Override this function or register a custom callback using I3C1_Target_ReceiveOverrunCallbackRegister.

• void I3C1_Target_ReadRequestReceivedCallback (void)

  Default weak callback for the Read Request Received event. Override this function or register a custom callback using I3C1_Target_ReadRequestReceivedCallbackRegister.

• const struct I3C_TARGET_INTERFACE I3C1_Target

  Structure object of type I3C_TARGET_INTERFACE with the custom name given by the user in the Melody Driver User interface. The default name e.g. I3C_TARGET can be changed via the 'Custom Name' field. Application-specific naming allows API portability across peripheral instances.

enum I3C_TARGET_BUFFER_RECEIVE_ERROR I3C1_Target_BufferReceive (uint8_t * rxBuf, uint16_t len)

Configures the buffer for the next Private Write transaction to receive data. The status of the transaction can be checked using the transaction complete callback.

enum I3C_TARGET_BUFFER_TRANSMIT_ERROR I3C1_Target_BufferTransmit (uint8_t * txBuf, uint16_t len)

Configures the buffer for the next Private Read transaction to transmit data. The status of the transaction can be checked using the transaction complete callback.

void I3C1_Target_CCCTableUpdatedCallback (void )

Default weak callback for the CCC Table Updated event. Override this function or register a custom callback using I3C1_Target_CCCTableUpdatedCallbackRegister.

void I3C1_Target_CCCTableUpdatedCallbackRegister (void(*)(void) callback)

Registers a callback for the CCC Table Updated event. Triggered when the Active Controller updates CCC-mapped registers (e.g. MWL, MRL) via a supported CCC command.

void I3C1_Target_CCCUpdateStatusGet (struct I3C_TARGET_CCC_UPDATE_STATUS * status)

Reads the current CCC update status from the I3CxTGTESTA register. Clears the sticky status bits (MWLSTA, MRLSTA) after reading. Call this inside the CCCTableUpdatedCallback to determine which CCC was received from the Active Controller.

void I3C1_Target_CommandQueueClear (void )

Clears the I3C1 Target command queue.

void I3C1_Target_Deinitialize (void )

De-initializes the I3C1 Target peripheral. Disables DMA channels, interrupts, resets all queues/buffers/state machine, and powers off the module.

void I3C1_Target_Disable (void )

Disables the I3C1 Target peripheral.

void I3C1_Target_DoubleBitECCErrorCallback (void )

Default weak callback for the Double-Bit ECC Error event. Override this function or register a custom callback using I3C1_Target_DoubleBitECCErrorCallbackRegister.

void I3C1_Target_DoubleBitECCErrorCallbackRegister (void(*)(void) callback)

Registers a callback for the Double-Bit ECC Error (DERR) interrupt event.

void I3C1_Target_DynamicAddressAssignedCallback (void )

Default weak callback for the Dynamic Address Assigned event. Override this function or register a custom callback using I3C1_Target_DynamicAddressAssignedCallbackRegister.

void I3C1_Target_DynamicAddressAssignedCallbackRegister (void(*)(void) callback)

Registers a callback for the Dynamic Address Assigned event.

void I3C1_Target_Enable (void )

Enables the I3C1 Target peripheral.

void I3C1_Target_HDRCommandCodeSet (uint8_t hdrCmdCode)

Sets the HDR-DDR command code for the next BufferTransmit call. Default is 0x00 (SDR Private Read). For HDR-DDR transfers, set the appropriate HDR command code before calling BufferTransmit.

enum I3C_TARGET_HJ_STATUS I3C1_Target_HotJoinStatusGet (void )

Returns the current status of the Hot-Join operation.

void I3C1_Target_IBIDoneCallback (enum I3C_TARGET_IBI_STATUS ibiStatus)

Default weak callback for the IBI Done event. Override this function or register a custom callback using I3C1_Target_IBIDoneCallbackRegister.

void I3C1_Target_IBIDoneCallbackRegister (void(*)(enum I3C_TARGET_IBI_STATUS ibiStatus) handler)

Registers a callback for the IBI Done event.

void I3C1_Target_IBIMandatoryDataByteSet (uint8_t mdb)

Sets the Mandatory Data Byte (MDB) for IBI requests.

uint8_t I3C1_Target_IBIPayloadSizeGet (void )

Gets the current IBI payload size.

void I3C1_Target_IBIPayloadSizeSet (uint8_t size)

Sets the IBI payload size.

enum I3C_TARGET_IBI_REQUEST_ERROR I3C1_Target_IBIRequest (uint8_t * payloadBuf, uint16_t payloadLen)

Initiates an In-Band Interrupt (IBI/SIR) request on the I3C bus.

void I3C1_Target_Initialize (void )

Initializes the I3C1 Target peripheral with default configuration.

bool I3C1_Target_IsDynamicAddressValid (void )

Checks whether the Dynamic Address has been assigned by the Controller.

uint8_t I3C1_Target_IsEnabled (void )

Checks whether the I3C1 Target peripheral is enabled.

bool I3C1_Target_IsIBIEnabledOnBus (void )

Checks if the IBI capability is enabled on the bus.

uint16_t I3C1_Target_MaxReadLengthGet (void )

Returns the configured maximum read length.

void I3C1_Target_MaxReadLengthSet (uint16_t maxReadLen)

Sets the maximum read length.

uint16_t I3C1_Target_MaxWriteLengthGet (void )

Returns the configured maximum write length.

void I3C1_Target_MaxWriteLengthSet (uint16_t maxWriteLen)

Sets the maximum write length.

void I3C1_Target_PECDisable (void )

Disables Packet Error Check (PEC) for SDR transfers. After calling this function, the Target will no longer append or validate CRC-8 bytes on SDR transfers.

void I3C1_Target_PECEnable (void )

Enables Packet Error Check (PEC) for SDR transfers. When enabled, the Target appends a CRC-8 byte to read/IBI transfers and validates the CRC-8 byte on write transfers.

void I3C1_Target_PeripheralReset (void )

Resets the I3C1 Target peripheral using the SOFTRST core software reset bit.

void I3C1_Target_ReadRequestReceivedCallback (void )

Default weak callback for the Read Request Received event. Override this function or register a custom callback using I3C1_Target_ReadRequestReceivedCallbackRegister.

void I3C1_Target_ReadRequestReceivedCallbackRegister (void(*)(void) callback)

Registers a callback for the Read Request Received event. Triggered when the Controller issues a read request and the command queue is empty.

void I3C1_Target_ReceiveOverrunCallback (void )

Default weak callback for the Receive Overrun event. Override this function or register a custom callback using I3C1_Target_ReceiveOverrunCallbackRegister.

void I3C1_Target_ReceiveOverrunCallbackRegister (void(*)(void) callback)

Registers a callback for the Receive Overrun event. Triggered when the RX FIFO overflows during a Controller Write transfer.

void I3C1_Target_ResponseQueueClear (void )

Clears the I3C1 Target response queue.

void I3C1_Target_Resume (void )

Resumes the I3C1 Target peripheral after a halt condition.

void I3C1_Target_RxBufferFIFOClear (void )

Clears the I3C1 Target RX buffer FIFO.

void I3C1_Target_SingleBitECCErrorCallback (void )

Default weak callback for the Single-Bit ECC Error event. Override this function or register a custom callback using I3C1_Target_SingleBitECCErrorCallbackRegister.

void I3C1_Target_SingleBitECCErrorCallbackRegister (void(*)(void) callback)

Registers a callback for the Single-Bit ECC Error (SERR) interrupt event.

void I3C1_Target_StartConditionDetectedCallback (void )

Default weak callback for the Start Condition Detected event. Override this function or register a custom callback using I3C1_Target_StartConditionDetectedCallbackRegister.

void I3C1_Target_StartConditionDetectedCallbackRegister (void(*)(void) callback)

Registers a callback for the Start Condition detection event.

void I3C1_Target_TransactionCompleteCallback (struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS * status)

Default weak callback for the Transaction Complete event. Override this function or register a custom callback using I3C1_Target_TransactionCompleteCallbackRegister.

void I3C1_Target_TransactionCompleteCallbackRegister (void(*)(struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS *transactionCompleteStatus) callback)

Registers a callback for the Transaction Complete event. The callback provides the data flow direction and total number of bytes transferred.

void I3C1_Target_TransactionErrorCallback (enum I3C_TARGET_TRANSACTION_ERROR_STATUS error)

Default weak callback for the Transaction Error event. Override this function or register a custom callback using I3C1_Target_TransactionErrorCallbackRegister.

void I3C1_Target_TransactionErrorCallbackRegister (void(*)(enum I3C_TARGET_TRANSACTION_ERROR_STATUS transactionError) handler)

Registers a callback for the Transaction Error event.

void I3C1_Target_TransmitUnderrunCallback (void )

Default weak callback for the Transmit Underrun event. Override this function or register a custom callback using I3C1_Target_TransmitUnderrunCallbackRegister.

void I3C1_Target_TransmitUnderrunCallbackRegister (void(*)(void) callback)

Registers a callback for the Transmit Underrun event. Triggered when the Extended TX FIFO underflows during a Controller Read transfer.

void I3C1_Target_TxBufferFIFOClear (void )

Clears the I3C1 Target TX buffer FIFO.

enum I3C_TARGET_ACTIVITY_STATE

Defines the activity state of the Target as set by the Controller via ENTAS0/ENTAS1/ENTAS2/ENTAS3 CCC commands.

enum I3C_TARGET_BUFFER_RECEIVE_ERROR

Defines the error status of the buffer receive operation.

enum I3C_TARGET_BUFFER_TRANSMIT_ERROR

Defines the error status of the buffer transmit operation.

enum I3C_TARGET_DATA_FLOW_DIRECTION

Defines the data flow direction of an I3C transaction.

enum I3C_TARGET_HJ_STATUS

Defines the status of the Hot-Join operation.

enum I3C_TARGET_IBI_REQUEST_ERROR

Defines the error states of the In-Band Interrupt request operation.

enum I3C_TARGET_IBI_STATUS

Defines the status codes for In-Band Interrupt operations.

enum I3C_TARGET_RX_CMD_SIZE

Defines the command word size in the RX FIFO prefix for received transfers. Indicates whether the first word in the RX buffer is data or an encoded command.

enum I3C_TARGET_TRANSACTION_ERROR_STATUS

Defines the transaction error status codes.

const struct I3C_TARGET_INTERFACE I3C1_Target

Structure object of type I3C_TARGET_INTERFACE with the custom name given by the user in the Melody Driver User interface. The default name e.g. I3C_TARGET can be changed via the 'Custom Name' field. Application-specific naming allows API portability across peripheral instances.

• bool mwlChanged

• bool mrlChanged

• bool ibiEnabled

• bool hotJoinEnabled

• bool controllerRequestEnabled

• enum I3C_TARGET_ACTIVITY_STATE activityState

enum I3C_TARGET_ACTIVITY_STATE activityState

Current activity state from ENTAS CCC

bool controllerRequestEnabled

Controller Request enabled on bus after ENEC/DISEC

bool hotJoinEnabled

Hot-Join enabled on bus after ENEC/DISEC

bool ibiEnabled

IBI (SIR) enabled on bus after ENEC/DISEC

bool mrlChanged

SETMRL CCC received â?? MRL updated by Controller

bool mwlChanged

SETMWL CCC received â?? MWL updated by Controller

• void(* Initialize )(void)

  Pointer to I3C1_Target_Initialize e.g. I3C1_Target_Initialize.

• void(* Deinitialize )(void)

  Pointer to I3C1_Target_Deinitialize e.g. I3C1_Target_Deinitialize.

• void(* Enable )(void)

  Pointer to I3C1_Target_Enable e.g. I3C1_Target_Enable.

• void(* Disable )(void)

  Pointer to I3C1_Target_Disable e.g. I3C1_Target_Disable.

• uint8_t(* IsEnabled )(void)

  Pointer to I3C1_Target_IsEnabled e.g. I3C1_Target_IsEnabled.

• bool(* IsDynamicAddressValid )(void)

  Pointer to I3C1_Target_IsDynamicAddressValid e.g. I3C1_Target_IsDynamicAddressValid.

• void(* Resume )(void)

  Pointer to I3C1_Target_Resume e.g. I3C1_Target_Resume.

• void(* PECEnable )(void)

  Pointer to I3C1_Target_PECEnable e.g. I3C1_Target_PECEnable.

• void(* PECDisable )(void)

  Pointer to I3C1_Target_PECDisable e.g. I3C1_Target_PECDisable.

• uint16_t(* MaxWriteLengthGet )(void)

  Pointer to I3C1_Target_MaxWriteLengthGet e.g. I3C1_Target_MaxWriteLengthGet.

• void(* MaxWriteLengthSet )(uint16_t maxWriteLen)

  Pointer to I3C1_Target_MaxWriteLengthSet e.g. I3C1_Target_MaxWriteLengthSet.

• uint16_t(* MaxReadLengthGet )(void)

  Pointer to I3C1_Target_MaxReadLengthGet e.g. I3C1_Target_MaxReadLengthGet.

• void(* MaxReadLengthSet )(uint16_t maxReadLen)

  Pointer to I3C1_Target_MaxReadLengthSet e.g. I3C1_Target_MaxReadLengthSet.

• void(* TxBufferFIFOClear )(void)

  Pointer to I3C1_Target_TxBufferFIFOClear e.g. I3C1_Target_TxBufferFIFOClear.

• void(* RxBufferFIFOClear )(void)

  Pointer to I3C1_Target_RxBufferFIFOClear e.g. I3C1_Target_RxBufferFIFOClear.

• void(* ResponseQueueClear )(void)

  Pointer to I3C1_Target_ResponseQueueClear e.g. I3C1_Target_ResponseQueueClear.

• void(* CommandQueueClear )(void)

  Pointer to I3C1_Target_CommandQueueClear e.g. I3C1_Target_CommandQueueClear.

• void(* PeripheralReset )(void)

  Pointer to I3C1_Target_PeripheralReset e.g. I3C1_Target_PeripheralReset.

• enum I3C_TARGET_BUFFER_RECEIVE_ERROR(* BufferReceive )(uint8_t *rxBuf, uint16_t len)

  Pointer to I3C1_Target_BufferReceive e.g. I3C1_Target_BufferReceive.

• enum I3C_TARGET_BUFFER_TRANSMIT_ERROR(* BufferTransmit )(uint8_t *txBuf, uint16_t len)

  Pointer to I3C1_Target_BufferTransmit e.g. I3C1_Target_BufferTransmit.

• void(* HDRCommandCodeSet )(uint8_t hdrCmdCode)

  Pointer to I3C1_Target_HDRCommandCodeSet e.g. I3C1_Target_HDRCommandCodeSet.

• enum I3C_TARGET_HJ_STATUS(* HotJoinStatusGet )(void)

  Pointer to I3C1_Target_HotJoinStatusGet e.g. I3C1_Target_HotJoinStatusGet.

• enum I3C_TARGET_IBI_REQUEST_ERROR(* IBIRequest )(uint8_t *payloadBuf, uint16_t payloadLen)

  Pointer to I3C1_Target_IBIRequest e.g. I3C1_Target_IBIRequest.

• void(* IBIMandatoryDataByteSet )(uint8_t mdb)

  Pointer to I3C1_Target_IBIMandatoryDataByteSet e.g. I3C1_Target_IBIMandatoryDataByteSet.

• void(* IBIPayloadSizeSet )(uint8_t size)

  Pointer to I3C1_Target_IBIPayloadSizeSet e.g. I3C1_Target_IBIPayloadSizeSet.

• uint8_t(* IBIPayloadSizeGet )(void)

  Pointer to I3C1_Target_IBIPayloadSizeGet e.g. I3C1_Target_IBIPayloadSizeGet.

• bool(* IsIBIEnabledOnBus )(void)

  Pointer to I3C1_Target_IsIBIEnabledOnBus e.g. I3C1_Target_IsIBIEnabledOnBus.

• void(* TransactionCompleteCallbackRegister )(void(*handler)(struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS *transactionCompleteStatus))

• void(* TransactionErrorCallbackRegister )(void(*handler)(enum I3C_TARGET_TRANSACTION_ERROR_STATUS transactionError))

• void(* IBIDoneCallbackRegister )(void(*handler)(enum I3C_TARGET_IBI_STATUS ibiStatus))

• void(* StartConditionDetectedCallbackRegister )(void(*callback)(void))

• void(* DynamicAddressAssignedCallbackRegister )(void(*callback)(void))

• void(* SingleBitECCErrorCallbackRegister )(void(*callback)(void))

• void(* DoubleBitECCErrorCallbackRegister )(void(*callback)(void))

• void(* CCCTableUpdatedCallbackRegister )(void(*callback)(void))

• void(* CCCUpdateStatusGet )(struct I3C_TARGET_CCC_UPDATE_STATUS *status)

• void(* TransmitUnderrunCallbackRegister )(void(*callback)(void))

• void(* ReceiveOverrunCallbackRegister )(void(*callback)(void))

• void(* ReadRequestReceivedCallbackRegister )(void(*callback)(void))

enum I3C_TARGET_BUFFER_RECEIVE_ERROR(* BufferReceive) (uint8_t *rxBuf, uint16_t len)

Pointer to I3C1_Target_BufferReceive e.g. I3C1_Target_BufferReceive.

enum I3C_TARGET_BUFFER_TRANSMIT_ERROR(* BufferTransmit) (uint8_t *txBuf, uint16_t len)

Pointer to I3C1_Target_BufferTransmit e.g. I3C1_Target_BufferTransmit.

void(* CCCTableUpdatedCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_CCCTableUpdatedCallbackRegister e.g. I3C1_Target_CCCTableUpdatedCallbackRegister

void(* CCCUpdateStatusGet) (struct I3C_TARGET_CCC_UPDATE_STATUS *status)

Pointer to I3C1_Target_CCCUpdateStatusGet e.g. I3C1_Target_CCCUpdateStatusGet

void(* CommandQueueClear) (void)

Pointer to I3C1_Target_CommandQueueClear e.g. I3C1_Target_CommandQueueClear.

void(* Deinitialize) (void)

Pointer to I3C1_Target_Deinitialize e.g. I3C1_Target_Deinitialize.

void(* Disable) (void)

Pointer to I3C1_Target_Disable e.g. I3C1_Target_Disable.

void(* DoubleBitECCErrorCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_DoubleBitECCErrorCallbackRegister e.g. I3C1_Target_DoubleBitECCErrorCallbackRegister

void(* DynamicAddressAssignedCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_DynamicAddressAssignedCallbackRegister e.g. I3C1_Target_DynamicAddressAssignedCallbackRegister

void(* Enable) (void)

Pointer to I3C1_Target_Enable e.g. I3C1_Target_Enable.

void(* HDRCommandCodeSet) (uint8_t hdrCmdCode)

Pointer to I3C1_Target_HDRCommandCodeSet e.g. I3C1_Target_HDRCommandCodeSet.

enum I3C_TARGET_HJ_STATUS(* HotJoinStatusGet) (void)

Pointer to I3C1_Target_HotJoinStatusGet e.g. I3C1_Target_HotJoinStatusGet.

void(* IBIDoneCallbackRegister) (void(*handler)(enum I3C_TARGET_IBI_STATUS ibiStatus))

Pointer to I3C1_Target_IBIDoneCallbackRegister e.g. I3C1_Target_IBIDoneCallbackRegister

void(* IBIMandatoryDataByteSet) (uint8_t mdb)

Pointer to I3C1_Target_IBIMandatoryDataByteSet e.g. I3C1_Target_IBIMandatoryDataByteSet.

uint8_t(* IBIPayloadSizeGet) (void)

Pointer to I3C1_Target_IBIPayloadSizeGet e.g. I3C1_Target_IBIPayloadSizeGet.

void(* IBIPayloadSizeSet) (uint8_t size)

Pointer to I3C1_Target_IBIPayloadSizeSet e.g. I3C1_Target_IBIPayloadSizeSet.

enum I3C_TARGET_IBI_REQUEST_ERROR(* IBIRequest) (uint8_t *payloadBuf, uint16_t payloadLen)

Pointer to I3C1_Target_IBIRequest e.g. I3C1_Target_IBIRequest.

void(* Initialize) (void)

Pointer to I3C1_Target_Initialize e.g. I3C1_Target_Initialize.

bool(* IsDynamicAddressValid) (void)

Pointer to I3C1_Target_IsDynamicAddressValid e.g. I3C1_Target_IsDynamicAddressValid.

uint8_t(* IsEnabled) (void)

Pointer to I3C1_Target_IsEnabled e.g. I3C1_Target_IsEnabled.

bool(* IsIBIEnabledOnBus) (void)

Pointer to I3C1_Target_IsIBIEnabledOnBus e.g. I3C1_Target_IsIBIEnabledOnBus.

uint16_t(* MaxReadLengthGet) (void)

Pointer to I3C1_Target_MaxReadLengthGet e.g. I3C1_Target_MaxReadLengthGet.

void(* MaxReadLengthSet) (uint16_t maxReadLen)

Pointer to I3C1_Target_MaxReadLengthSet e.g. I3C1_Target_MaxReadLengthSet.

uint16_t(* MaxWriteLengthGet) (void)

Pointer to I3C1_Target_MaxWriteLengthGet e.g. I3C1_Target_MaxWriteLengthGet.

void(* MaxWriteLengthSet) (uint16_t maxWriteLen)

Pointer to I3C1_Target_MaxWriteLengthSet e.g. I3C1_Target_MaxWriteLengthSet.

void(* PECDisable) (void)

Pointer to I3C1_Target_PECDisable e.g. I3C1_Target_PECDisable.

void(* PECEnable) (void)

Pointer to I3C1_Target_PECEnable e.g. I3C1_Target_PECEnable.

void(* PeripheralReset) (void)

Pointer to I3C1_Target_PeripheralReset e.g. I3C1_Target_PeripheralReset.

void(* ReadRequestReceivedCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_ReadRequestReceivedCallbackRegister e.g. I3C1_Target_ReadRequestReceivedCallbackRegister

void(* ReceiveOverrunCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_ReceiveOverrunCallbackRegister e.g. I3C1_Target_ReceiveOverrunCallbackRegister

void(* ResponseQueueClear) (void)

Pointer to I3C1_Target_ResponseQueueClear e.g. I3C1_Target_ResponseQueueClear.

void(* Resume) (void)

Pointer to I3C1_Target_Resume e.g. I3C1_Target_Resume.

void(* RxBufferFIFOClear) (void)

Pointer to I3C1_Target_RxBufferFIFOClear e.g. I3C1_Target_RxBufferFIFOClear.

void(* SingleBitECCErrorCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_SingleBitECCErrorCallbackRegister e.g. I3C1_Target_SingleBitECCErrorCallbackRegister

void(* StartConditionDetectedCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_StartConditionDetectedCallbackRegister e.g. I3C1_Target_StartConditionDetectedCallbackRegister

void(* TransactionCompleteCallbackRegister) (void(*handler)(struct I3C_TARGET_TRANSACTION_COMPLETE_STATUS *transactionCompleteStatus))

Pointer to I3C1_Target_TransactionCompleteCallbackRegister e.g. I3C1_Target_TransactionCompleteCallbackRegister

void(* TransactionErrorCallbackRegister) (void(*handler)(enum I3C_TARGET_TRANSACTION_ERROR_STATUS transactionError))

Pointer to I3C1_Target_TransactionErrorCallbackRegister e.g. I3C1_Target_TransactionErrorCallbackRegister

void(* TransmitUnderrunCallbackRegister) (void(*callback)(void))

Pointer to I3C1_Target_TransmitUnderrunCallbackRegister e.g. I3C1_Target_TransmitUnderrunCallbackRegister

void(* TxBufferFIFOClear) (void)

Pointer to I3C1_Target_TxBufferFIFOClear e.g. I3C1_Target_TxBufferFIFOClear.

• struct {

  • uint32_t ATTR: 3

  • uint32_t LAST: 1

  • uint32_t FIRST: 1

  • uint32_t DEFTGTS: 1

  • uint32_t RESERVED1: 1

  • uint32_t CCC: 1

  • uint32_t ERR_STATUS: 4

  • uint32_t CMD_SIZE: 4

  • uint32_t TARGET_ID: 5

  • uint32_t RESERVED2: 3

  • uint32_t DATA_LENGTH: 8

• } frame

• uint32_t RespondData

uint32_t ATTR

Response Attribute

uint32_t CCC

0 = Private Write, 1 = CCC Write

uint32_t CMD_SIZE

Command size indicator

uint32_t DATA_LENGTH

Data length of the transfer

uint32_t DEFTGTS

Response is for DEFTGTS CCC

uint32_t ERR_STATUS

Error Status

uint32_t FIRST

First response of the transfer

struct { ... } frame

uint32_t LAST

Last response of the transfer

uint32_t RESERVED1

Reserved

uint32_t RESERVED2

Reserved

uint32_t RespondData

uint32_t TARGET_ID

Target ID

• enum I3C_TARGET_DATA_FLOW_DIRECTION dataFlowDirection

• uint16_t numOfBytesReceived

• uint16_t numOfBytesTransmitted

• enum I3C_TARGET_RX_CMD_SIZE cmdSize

enum I3C_TARGET_RX_CMD_SIZE cmdSize

Command word prefix in RX buffer. CMD_NONE = SDR (all bytes are data). Non-zero = HDR (first word is command, rest is data).

enum I3C_TARGET_DATA_FLOW_DIRECTION dataFlowDirection

uint16_t numOfBytesReceived

uint16_t numOfBytesTransmitted

• union {

  • struct {

    • uint32_t CMD_ATTR: 3

    • uint32_t RESERVED1: 3

    • uint32_t FINITE_DL: 1

    • uint32_t RESERVED2: 1

    • uint32_t ERR_STATUS: 8

    • uint32_t CMD_VLD: 1

    • uint32_t RESERVED3: 7

    • uint32_t CCC: 1

    • uint32_t ADDR_MSK: 2

    • uint32_t RESERVED4: 1

    • uint32_t ADDR_OFFSET: 4

  • } F[1/2]

  • uint32_t BYTE1

• } CMD_BYTE1

• union {

  • struct {

    • uint32_t CCC_HDR_HEADER: 8

    • uint32_t DB: 8

    • uint32_t DATA_LENGTH: 16

  • } F[2/2]

  • uint32_t BYTE2

• } CMD_BYTE2

uint32_t ADDR_MSK

uint32_t ADDR_OFFSET

uint32_t BYTE1

uint32_t BYTE2

uint32_t CCC

uint32_t CCC_HDR_HEADER

uint32_t CMD_ATTR

union { ... } CMD_BYTE1

union { ... } CMD_BYTE2

uint32_t CMD_VLD

uint32_t DATA_LENGTH

uint32_t DB

uint32_t ERR_STATUS

struct { ... } F

struct { ... } F

uint32_t FINITE_DL

uint32_t RESERVED1

uint32_t RESERVED2

uint32_t RESERVED3

uint32_t RESERVED4