3.2.8.8 Wi-Fi/BT

The SAMA5D2-ICP is ready to host either a ATWILC3000-MR110CA or a ATWILC3000-MR110UA WiFi/BT module. These modules are designed to achieve reliable and power-efficient physical layer communication as specified by IEEE 802.11 b/g/n in Single Stream mode with 20 MHz bandwidth.

The main difference between these modules is that ATWILC3000-MR110CA features a chip antenna, while ATWILC3000-MR110UA hosts a u.FL connector which can connect to any WiFi/BT external antenna that has a u.FL mating connector.

Advanced algorithms have been employed to achieve maximum throughput in a real-world communication environment with impairments and interference. The PHY implements all the required functions such as FFT, filtering, FEC (Viterbi decoder), frequency and timing acquisition and tracking, channel estimation and equalization, carrier sensing and clear channel assessment, as well as automatic gain control.

These modules are available in a fully certified, 22.428 x 17.732 mm, 36-pin module package. For more details on the module, refer to the product web page.

The figure below illustrates the implementation of the WILC3000 Wi-Fi/BT module. Note that it is not populated, thus the customer may choose the most suitable option. Application note AN_3227, How to Manually Solder the ATWILC3000 Module on an MPU Board, offers guidance on how to add the ATWILC3000 module to the board.

Figure 3-32. Wi-Fi/BT Module
Table 3-17. Wi-Fi/BT Signal Descriptions
PIOMnemonicSharedSignal Description
PA18SDIO_DATA0–SDIO data
PA19SDIO_DATA1–SDIO data
PA20SDIO_DATA2–SDIO data
PA21SDIO_DATA3–SDIO data
PA28SDIO_CMDEtherCATSDIO command
PA22SDIO_CLKEtherCATSDIO clock
PA6BT_TXDQSPIBluetooth serial TX
PA7BT_RXDQSPIBluetooth serial RX
PA10BT_RTSQSPIBluetooth serial RTS
PA9BT_CTSQSPIBluetooth serial CTS
PA8RESET_N–Module reset
PC14IRQ_N–Interrupt
PC15CHIP_EN–Chip enable
Figure 3-33. WILC3000 Location