ATtiny87/167 Automotive

2.4.2 Register Bits of DIDR1

ADC8D, ADC9D and ADC10D (digital input disable) initially located at bit 4 up to 6 are instead located at bit 0 up to 2. These register bits are also in write-only mode.

Work Around

Allow for the change in bit locations and the access mode restriction.

Affected Silicon Revisions


Rev. A	Rev. B	Rev. C
X	-	-

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.