30.4.7 LUT n Control B

Note:

For available pins and functionality, refer to the I/O Multiplexing and Considerations section.
SPI connections to the CCL work in Host SPI mode only.
USART connections to the CCL work only when the USART is in one of the following modes:
- Asynchronous USART
- Synchronous USART Host

Name:	LUTnCTRLB
Offset:	0x09 + n*0x04 [n=0..3]
Reset:	0x00
Property:	Enable-Protected


Bit	7	6	5	4	3	2	1	0
	INSEL1[3:0]				INSEL0[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:4 – INSEL1[3:0] LUT Input 1 Source Selection

These bits select the source for input 1 of the LUT.

Value	Name	Description
0x0	MASK	Masked input
0x1	FEEDBACK	Feedback input
0x2	LINK	Output from LUT[n+1] as input source
0x3	EVENTA	Event A as input source
0x4	EVENTB	Event B as input source
0x5	IN1	IN1 input source
0x6	AC0	AC0 OUT input source
0x7	USART1	USART1 TXD input source
0x8	SPI0	SPI0 MOSI input source
0x9	TCA0	TCA0 WO1 input source
0xA	TCB1	TCB1 WO input source
Other	—	Reserved

Bits 3:0 – INSEL0[3:0] LUT Input 0 Source Selection

These bits select the source for input 0 of the LUT.

Value	Name	Description
0x0	MASK	Masked input
0x1	FEEDBACK	Feedback input
0x2	LINK	Output from LUT[n+1] as input source
0x3	EVENTA	Event A as input source
0x4	EVENTB	Event B as input source
0x5	IN0	IN0 input source
0x6	AC0	AC0 OUT input source
0x7	USART0	USART0 TXD input source
0x8	SPI0	SPI0 MOSI input source
0x9	TCA0	TCA0 WO0 input source
0xA	TCB0	TCB1 WO input source
Other	—	Reserved

DS40002548B

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