AVR® DA(S) Family Overview
The figure below shows the AVR® DA(S) devices, laying out pin count variants and memory sizes:
- Vertical migration is possible without code modification, as these devices are fully pin and feature compatible
- Horizontal migration to the left reduces the pin count, and therefore, the available features
Devices with different Flash memory sizes typically also have different SRAM.
The name of a device in the AVR® DA(S) family is decoded as follows: