3.12.1 Integer and Fractional Data

The DSP engine supports both integer and fractional data types. Integer data is inherently represented as a signed two’s complement value, where the MSb is defined as a Sign bit. Generally speaking, the range of an N-bit two’s complement integer is -2^N-1 to 2^N-1 – 1. For a 16-bit integer, the data range is -32768 (0x8000) to 32767 (0x7FFF), including ‘0’. For a 32-bit integer, the data range is -2,147,483,648 (0x8000 0000) to 2,147,483,647 (0x7FFF FFFF).

Fractional data is represented as a two’s complement number, where the MSb is defined as a Sign bit and the radix point is implied to lie just after the Sign bit. This format is commonly referred to as 1.15 (or Q15) format, where 1 is the number of bits used to represent the integer portion of the number and 15 is the number of bits used to represent the fractional portion. The range of an N-bit two’s complement fraction with this implied radix point is -1.0 to (1 – 2^1-N). For a 16-bit fraction, the 1.15 data range is -1.0 (0x8000) to 0.999969482 (0x7FFF), including 0.0 and it has a precision of 3.05176x10^-5. In Normal Saturation mode, the 32-bit accumulators use a 1.31 format, which enhances the precision to 4.6566x10^-10. In Fractional mode, the 32x32-bit dsPIC33A multiplier generates a Q1.63 product, which has a precision of 1.08420x10^-19.

The dynamic range of the accumulators can be expanded by using the eight bits of the Upper Accumulator register (ACCxU) as Guard bits. Guard bits are used if the value stored in the accumulator overflows beyond the 62^nd bit and they are useful for implementing DSP algorithms. This mode is enabled when the ACCSAT bit (CORCON[4]) is set to ‘1’ and it expands the accumulators to 72 bits. The Guard bits are also used when the accumulator saturation is disabled. The accumulators then support an integer range of –2⁷¹ (0x80 0000 0000 0000 0000) to 2^71-1 (0x7F FFFF FFFF FFFF FFFF). In Fractional mode, the Guard bits of the accumulator do not modify the location of the radix point and the 72-bit accumulators use a 9.63 fractional format. Note that all fractional operation results are stored in the 72-bit accumulator, justified with a 1.63 radix point. As in Integer mode, the Guard bits merely increase the dynamic range of the accumulator. 9.63 fractions have a range of –256.0 (0x80 0000 0000 0000 0000) to 256.0 –1.08420x10-19 (0x7F FFFF FFFF FFFF FFFF).

Table 3-10 identifies the range and precision of integers and fractions on 16-bit, 32-bit and 72-bit registers.

With the exception of DSP multiplies, the ALU operates identically on integer and fractional data. Namely, an addition of two integers will yield the same result (binary number) as the addition of two fractional numbers. The only difference is how the result is interpreted by the user. However, multiplies performed by DSP operations are different. In these instructions, data format selection is made by the IF bit (CORCON[0]) and it must be set accordingly (‘0’ for Fractional mode, ‘1’ for Integer mode). This is required because of the implied radix point used by fractional numbers.