3.13 Accumulator Usage

Accumulators A and B are utilized by DSP instructions to perform mathematical and shifting operations. Since the accumulators are 72-bits wide and the X and Y data paths are only 32 bits, the method to load and store the accumulators must be understood.

Item A in Figure 3-13 shows that each 72-bit accumulator (ACCA and ACCB) consists of an 8-bit upper register (ACCxU), a 32-bit high register (ACCxH) and a 32-bit low register (ACCxL). To address the bus alignment requirement and provide the ability for 1.31 math, ACCxH is used as a destination register for loading the accumulator (with the LAC instruction) and also as a source register for storing the accumulator (with the SACR instruction). This is represented by Item B in Figure 3-13, where the upper and lower portions of the accumulator are shaded. In reality, during accumulator loads, ACCxL is zero backfilled and ACCxU is sign-extended to represent the sign of the value loaded in ACCxH.

When normal (63-bit) saturation is enabled, DSP operations (such as ADD, MAC, MSC, etc.) solely utilize ACCxH:ACCxL (item C in Figure 3-13) and ACCxU is only used to maintain the sign of the value stored in ACCxH:ACCxL. For instance, when an MPY instruction is executed, the result is stored in ACCxH:ACCxL, and the sign of the result is extended through ACCxU.

When super saturation is enabled, or when saturation is disabled, all registers of the accumulator may be used (item D in Figure 3-13), and the results of DSP operations are stored in ACCxU:ACCxH:ACCxL. The benefit of ACCxU is that it increases the dynamic range of the accumulator, as described in Integer and Fractional Data. Refer to Table 3-10 to see the range of values which may be stored in the accumulator when in Normal and Super Saturation modes.