3.10.1 Floating Point Branch Instruction

Subsequent to floating point CPS/CPQ instructions setting one of the FSR ordering relations status bits, a subsequent floating point conditional branch (FBRA) instruction will (indirectly) examine these status bits, applying them to a logical predicate that represents the required condition. A list of the supported floating point branches and corresponding predicates is shown in Table 3-9.

Table 3-9. FPU Conditional Branch Instruction
Condition Mnemonic(1)DescriptionStatus test
EQEqualFSR.EQ
UNEUnordered or Not Equal(FSR.GT || FSR.LT || FSR.UN)
NENot Equal(FSR.GT || FSR.LT)
UEQUnordered or Equal(FSR.EQ || FSR.UN)
GTGreater ThanFSR.GT
ULEUnordered or Less Than or Equal(FSR.LT || FSR.EQ || FSR.UN)
GEGreater Than or Equal(FSR.GT || FSR.EQ)
ULTUnordered or Less Than(FSR.LT || FSR.UN)
LTLess ThanFSR.LT
UGEUnordered or Greater Than or Equal(FSR.GT || FSR.EQ || FSR.UN)
LELess Than or Equal(FSR.LT || FSR.EQ)
UGTUnordered or Greater Than(FSR.GT || FSR.UN)
OROrdered(FSR.GT || FSR.LT || FSR.EQ)
UNUnorderedFSR.UN
Note:
  1. Instructions are of the form: FBRA mnemonic, Expr.