20.3 Predefined Macros

Several predefined macros are available once you include <xc.h>. The exact operation of these macros is dependent on the instruction set employed. The following table shows general purpose predefined macros and their operation.

Table 20-5. Predefined Macros in XC.H
Macro Description
_bcc0(rn, sel, clr) For the CP0 register specified by rn and sel, clear bits corresponding to those bits in clr which are non-zero.
_bcsc0(rn, sel, clr, set) For the CP0 register specified by rn and sel, clear bits corresponding to those bits in clr which are non-zero, and set bits corresponding to those bits in set which are non-zero.
_bsc0(rn, sel, set) For the CP0 register specified by rn and sel, clear bits corresponding to those bits in clr which are non-zero.
_bswapw(x) See <xc.h> file. Byte-swap word.
_cache(op,addr) Do an operation to a cache line. See the device documentation for details on the available operations.
_clo(x) Count leading ones in x.
_clz(x) Count leading zeros in x.
_ctz(x) Count trailing zeros in x.
_dclo(x) Simulate 64-bit count leading ones in x.
_dclz(x) Simulate 64-bit count leading zeros in x.
_dctz(x Simulate 64-bit count trailing zeros in x.
_ehb() Insert Execution Hazard Barrier instruction.
_ext(x,pos,sz) See <xc.h> file. Extract bitfield from a 32-bit variable.
_get_byte(addr, errp) Return the least significant byte of addr.
_get_dword(addr, errp) Return the least significant 64-bit word of addr.
_get_half(addr, errp) Return the least significant 16-bit word of addr.
_get_word(addr, errp) Return the least significant 32-bit word of addr.
_ins(tgt,val,pos,sz) See <xc.h> file. Insert bits.
_jr_hb() See <xc.h> file. Jump register with hazard barrier.
_mfc0(rn, sel) See <xc.h> file. Move a value from a coprocessor 0 register.
_mtc0(rn, sel, v) See <xc.h> file. Move a value to a coprocessor 0 register.
_mxc0(rn, sel, v) See <xc.h> file. Exchange a value with a value in a coprocessor 0 register.
_nop() Insert a No Operation instruction.
_prefetch(hint,x) Prefetch instruction for memory reference optimization. An application that knows in advance it may need data can arrange for it to be brought into cache. 'hint' defines which sort of prefetch this is.
_put_byte(addr, v) Write the least significant byte of addr with v.
_put_dword(addr, v) Write the least significant 64-bit word of addr with v.
_put_half(addr, v) Write the least significant 16-bit word of addr with v.
_put_word(addr, v) Write the least significant 32-bit word of addr with v.
_rdpgpr(regno) See <xc.h> file. Read register from previous register set.
_sync() Insert Synchronize Shared Memory instruction.
_synci(addr) Synchronize the I-cache with the D-cache; Run instruction for each cache-line-sized block after writing instructions but before executing them.
_wait() Insert instruction to enter Standby mode.
_wrpgpr(regno, val) See <xc.h> file. Write to a register in the previous register set.
_wsbh(x) See <xc.h> file. 32-bit byte-swap within each of the two halfword.
__XC32_PART_SUPPORT_UPDATE This macro expands to the letter corresponding to the part-support update version being used. The value is based upon the major and minor version numbers of the current release. For example, part-support update version v1.42(B) will have #define __XC32_PART_SUPPORT_UPDATE B
__XC32_PART_SUPPORT_VERSION This macro expands to a numeric value corresponding to the part-support update version being used. The value is based upon the major and minor version numbers of the current release. For example, part-support update version v1.42(B) will have #define __XC32_PART_SUPPORT_UPDATE 1420.