19.5 CRC Interrupt

The CRC module will generate an interrupt when the BUSY bit transitions from ‘1’ to ‘0’. The CRC Interrupt Flag (CRCIF) bit of the corresponding PIR register will be set every time the BUSY bit transitions, regardless of whether or not the CRC Interrupt Enable (CRCIE) bit has been set. The CRCIF bit must be cleared by software by the user. If the user has the CRCIE bit set, then the CPU will jump to the Interrupt Service Routine (ISR) every time that the CRCIF bit is set.