Data is supplied to the CRC module using the CRCDATA
registers. The length of the data word being supplied to the CRC module is specified by
the DLEN
bits and can be configured for data words up to 32 bits in length. The DLEN field
indicates how many bits in the CRCDATA registers are valid and any bits outside of the
specified data word size will be ignored. Data is moved into the CRCSHIFT
registers as an intermediate to calculate the check value located in the CRCOUT
registers. The SHIFTM bit is used to determine the bit order of the data being shifted
into the accumulator and the bit order of the result.
Important: If data is
still being shifted from an earlier write to the CRCDATA registers and the user
attempts to write more data, the most recently written data will be held in the
CRCDATA registers until the previous shift has completed.
Figure 19-1. CRC Process
When the SHIFTM bit is not set, data will be shifted into the CRC, MSb first
and the result will be big-endian. When the SHIFTM bit is set, data will be shifted into
the accumulator in the reversed order (LSb first) and the result will be little-endian.
The CRC module can be seeded with an initial value by setting the CRCOUT registers to
the appropriate value before beginning the CRC process.
