This application uses two DMA modules, as shown in Figure 2-1. One DMA module feeds data from the look-up table (LUT)
into the DAC, and the other DMA feeds the Analog-to-Digital Converter (ADC) reading from
a potentiometer to the period value of the Timer2 module, which determines the frequency
of the waveform.Figure 2-1. AWG Block Diagram
The DAC feeder (DMA1) is configured to be triggered by the Timer2 output.
The source address and length are user selectable and the destination is DAC1DAT. The
period selector (DMA2) is configured to be triggered by the conversion complete flag of
the continuously converting ADC, which is continuously sampling a potentiometer. The
source is the upper byte of the left-justified output, and the destination is the Timer2
period value.
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